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([2001:b07:6468:f312:10f7:67c8:abb4:8512]) by smtp.gmail.com with ESMTPSA id g11sm38843114wru.24.2019.07.22.04.50.20 (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Mon, 22 Jul 2019 04:50:20 -0700 (PDT) To: Jing Liu , qemu-devel@nongnu.org References: <1562823509-13072-1-git-send-email-jing2.liu@linux.intel.com> <0f9763fe-af69-e057-9fb1-00527e636fe4@redhat.com> <0ffa32db-3615-16e0-71bf-a8c552c2fcfb@linux.intel.com> <757b193f-90c6-0516-9372-74463ec4d117@redhat.com> <4e381ae0-78d5-afb6-9a4d-b58d0daa60ba@linux.intel.com> From: Paolo Bonzini Openpgp: preference=signencrypt Message-ID: <3bc3b6f0-a6f8-39a7-b7d4-39b18916cc44@redhat.com> Date: Mon, 22 Jul 2019 13:50:21 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <4e381ae0-78d5-afb6-9a4d-b58d0daa60ba@linux.intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.66 Subject: Re: [Qemu-devel] [PATCH v1] x86: Intel AVX512_BF16 feature enabling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 22/07/19 04:59, Jing Liu wrote: > > > On 7/19/2019 4:10 PM, Paolo Bonzini wrote: >> On 19/07/19 09:20, Jing Liu wrote: >>>> Then CPUID[7,0].EAX is set automatically to 0 or 1 depending on whether >>>> BF16 is enabled or not. >>> >>> Could I ask why don't we directly check BF16 enabling when >>> cpu_x86_cpuid(env, 7, 0, ...) during kvm_arch_init_vcpu ? >> >> Because the code for setting CPUID is common for all accelerators (there >> are five supported: KVM, HAX, HVF, TCG, WHPX). >> >>> What is the use of the two new properties? Are they used for users >>> setting parameters when boot up guest, and why we need users setting >>> func7 level? >> >> For example to test guests with CPUID[7,0].EAX==1, even if the host does >> not have BF16. > > Thanks. :) >> >> >>> @@ -5075,6 +5101,10 @@ static void x86_cpu_expand_features(X86CPU *cpu, >>> Error **errp) >>>           x86_cpu_adjust_feat_level(cpu, FEAT_SVM); >>>           x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); >>> >>> +       if ((env->features[FEAT_7_1_EAX] & CPUID_7_1_EAX_AVX512_BF16) && >>> +            kvm_enabled()) { >> >> No need to check KVM.  You could also do just >> x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX) and set >> cpu->min_level_func7 in x86_cpu_adjust_feat_level with something like >> >>      if (eax == 7) { >>          x86_cpu_adjust_level(cpu, &env->cpu_min_level_func7, >>                               fi->cpuid.ecx); >>      } >> > > Got it. One question I'm wondering is, is it possible for users setting > an invalid property like level-func7=2? Do we need some protection? No, it's still not found in Intel silicon, but in principle you could have higher indices than 1. So it's okay, if something breaks it's the fault of whoever set the option! Paolo