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* [PATCH] tcg/aarch64: Remove unused code in tcg_out_op
@ 2022-10-17  2:08 Qi Hu
  2022-10-17  6:30 ` Richard Henderson
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Qi Hu @ 2022-10-17  2:08 UTC (permalink / raw)
  To: Richard Henderson; +Cc: qemu-arm, qemu-devel, WANG Xuerui

AArch64 defines the TCG_TARGET_HAS_direct_jump. So the "else" block is
useless in the case of "INDEX_op_goto_tb" in function "tcg_out_op". Add
an assertion and delete these codes for clarity.

Suggested-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Qi Hu <huqi@loongson.cn>
---
 tcg/aarch64/tcg-target.c.inc | 31 ++++++++++++++-----------------
 1 file changed, 14 insertions(+), 17 deletions(-)

diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index d997f7922a..344b63e20f 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1916,24 +1916,21 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
         break;
 
     case INDEX_op_goto_tb:
-        if (s->tb_jmp_insn_offset != NULL) {
-            /* TCG_TARGET_HAS_direct_jump */
-            /* Ensure that ADRP+ADD are 8-byte aligned so that an atomic
-               write can be used to patch the target address. */
-            if ((uintptr_t)s->code_ptr & 7) {
-                tcg_out32(s, NOP);
-            }
-            s->tb_jmp_insn_offset[a0] = tcg_current_code_size(s);
-            /* actual branch destination will be patched by
-               tb_target_set_jmp_target later. */
-            tcg_out_insn(s, 3406, ADRP, TCG_REG_TMP, 0);
-            tcg_out_insn(s, 3401, ADDI, TCG_TYPE_I64, TCG_REG_TMP, TCG_REG_TMP, 0);
-        } else {
-            /* !TCG_TARGET_HAS_direct_jump */
-            tcg_debug_assert(s->tb_jmp_target_addr != NULL);
-            intptr_t offset = tcg_pcrel_diff(s, (s->tb_jmp_target_addr + a0)) >> 2;
-            tcg_out_insn(s, 3305, LDR, offset, TCG_REG_TMP);
+        tcg_debug_assert(s->tb_jmp_insn_offset != NULL);
+        /*
+         * Ensure that ADRP+ADD are 8-byte aligned so that an atomic
+         * write can be used to patch the target address.
+         */
+        if ((uintptr_t)s->code_ptr & 7) {
+            tcg_out32(s, NOP);
         }
+        s->tb_jmp_insn_offset[a0] = tcg_current_code_size(s);
+        /*
+         * actual branch destination will be patched by
+         * tb_target_set_jmp_target later
+         */
+        tcg_out_insn(s, 3406, ADRP, TCG_REG_TMP, 0);
+        tcg_out_insn(s, 3401, ADDI, TCG_TYPE_I64, TCG_REG_TMP, TCG_REG_TMP, 0);
         tcg_out_insn(s, 3207, BR, TCG_REG_TMP);
         set_jmp_reset_offset(s, a0);
         break;
-- 
2.38.0



^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH] tcg/aarch64: Remove unused code in tcg_out_op
  2022-10-17  2:08 [PATCH] tcg/aarch64: Remove unused code in tcg_out_op Qi Hu
@ 2022-10-17  6:30 ` Richard Henderson
  2022-10-17 20:43 ` Philippe Mathieu-Daudé
  2022-10-20 22:44 ` Richard Henderson
  2 siblings, 0 replies; 4+ messages in thread
From: Richard Henderson @ 2022-10-17  6:30 UTC (permalink / raw)
  To: Qi Hu; +Cc: qemu-arm, qemu-devel, WANG Xuerui

On 10/17/22 12:08, Qi Hu wrote:
> AArch64 defines the TCG_TARGET_HAS_direct_jump. So the "else" block is
> useless in the case of "INDEX_op_goto_tb" in function "tcg_out_op". Add
> an assertion and delete these codes for clarity.
> 
> Suggested-by: WANG Xuerui<git@xen0n.name>
> Signed-off-by: Qi Hu<huqi@loongson.cn>
> ---
>   tcg/aarch64/tcg-target.c.inc | 31 ++++++++++++++-----------------
>   1 file changed, 14 insertions(+), 17 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] tcg/aarch64: Remove unused code in tcg_out_op
  2022-10-17  2:08 [PATCH] tcg/aarch64: Remove unused code in tcg_out_op Qi Hu
  2022-10-17  6:30 ` Richard Henderson
@ 2022-10-17 20:43 ` Philippe Mathieu-Daudé
  2022-10-20 22:44 ` Richard Henderson
  2 siblings, 0 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2022-10-17 20:43 UTC (permalink / raw)
  To: Qi Hu, Richard Henderson; +Cc: qemu-arm, qemu-devel, WANG Xuerui

On 17/10/22 04:08, Qi Hu wrote:
> AArch64 defines the TCG_TARGET_HAS_direct_jump. So the "else" block is
> useless in the case of "INDEX_op_goto_tb" in function "tcg_out_op". Add
> an assertion and delete these codes for clarity.
> 
> Suggested-by: WANG Xuerui <git@xen0n.name>
> Signed-off-by: Qi Hu <huqi@loongson.cn>
> ---
>   tcg/aarch64/tcg-target.c.inc | 31 ++++++++++++++-----------------
>   1 file changed, 14 insertions(+), 17 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] tcg/aarch64: Remove unused code in tcg_out_op
  2022-10-17  2:08 [PATCH] tcg/aarch64: Remove unused code in tcg_out_op Qi Hu
  2022-10-17  6:30 ` Richard Henderson
  2022-10-17 20:43 ` Philippe Mathieu-Daudé
@ 2022-10-20 22:44 ` Richard Henderson
  2 siblings, 0 replies; 4+ messages in thread
From: Richard Henderson @ 2022-10-20 22:44 UTC (permalink / raw)
  To: Qi Hu; +Cc: qemu-arm, qemu-devel, WANG Xuerui

On 10/17/22 12:08, Qi Hu wrote:
> AArch64 defines the TCG_TARGET_HAS_direct_jump. So the "else" block is
> useless in the case of "INDEX_op_goto_tb" in function "tcg_out_op". Add
> an assertion and delete these codes for clarity.
> 
> Suggested-by: WANG Xuerui <git@xen0n.name>
> Signed-off-by: Qi Hu <huqi@loongson.cn>
> ---
>   tcg/aarch64/tcg-target.c.inc | 31 ++++++++++++++-----------------
>   1 file changed, 14 insertions(+), 17 deletions(-)

Thanks, queued to tcg-next.


r~


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2022-10-20 22:57 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2022-10-17  2:08 [PATCH] tcg/aarch64: Remove unused code in tcg_out_op Qi Hu
2022-10-17  6:30 ` Richard Henderson
2022-10-17 20:43 ` Philippe Mathieu-Daudé
2022-10-20 22:44 ` Richard Henderson

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