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([2001:8004:2728:321b:4bd7:3071:22d6:a756]) by smtp.gmail.com with ESMTPSA id j8-20020a63e748000000b005c6e8fa9f24sm1980383pgk.49.2024.01.18.12.50.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 18 Jan 2024 12:50:11 -0800 (PST) Message-ID: <3cb918ca-27cd-4f1e-8738-306dc5280f42@linaro.org> Date: Fri, 19 Jan 2024 07:50:03 +1100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/6] target/riscv: Add helper functions to calculate current number of masked bits for pointer masking To: Deepak Gupta , Alexey Baturo Cc: zhiwei_liu@linux.alibaba.com, palmer@dabbelt.com, Alistair.Francis@wdc.com, sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de, qemu-devel@nongnu.org, qemu-riscv@nongnu.org References: <20240109102930.405323-1-me@deliversmonkey.space> <20240109102930.405323-4-me@deliversmonkey.space> Content-Language: en-US From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::12c; envelope-from=richard.henderson@linaro.org; helo=mail-il1-x12c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/19/24 04:21, Deepak Gupta wrote: > On Tue, Jan 9, 2024 at 2:31 AM Alexey Baturo wrote: >> >> From: Alexey Baturo >> >> Signed-off-by: Alexey Baturo >> --- > >> + >> +bool riscv_cpu_virt_mem_enabled(CPURISCVState *env) >> +{ >> + bool virt_mem_en = false; >> +#ifndef CONFIG_USER_ONLY >> + int satp_mode = 0; >> + int priv_mode = cpu_address_mode(env); >> + /* Get current PMM field */ >> + if (riscv_cpu_mxl(env) == MXL_RV32) { >> + satp_mode = get_field(env->satp, SATP32_MODE); >> + } else { >> + satp_mode = get_field(env->satp, SATP64_MODE); >> + } >> + virt_mem_en = ((satp_mode != VM_1_10_MBARE) && (priv_mode != PRV_M)); >> +#endif >> + return virt_mem_en; > > Obsessing a little bit on how to test PM enabled binaries with qemu-user. > If we return false above then we're not allowed to test binaries with > pointer masking enabled with qemu-user. > That use case is not required? In a previous round I suggested that the ifdefs are not necessary. But for now it will always be off for qemu-user. At some point pointer masking will be in hardware, and the kernel will gain support for it, and there will likely be a prctl() added for it. At the point the kernel finalizes the API, you will be able to enable pointer masking for qemu-user. r~