From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: Yong-Xuan Wang <yongxuan.wang@sifive.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: greentime.hu@sifive.com, vincent.chen@sifive.com,
frank.chang@sifive.com, jim.shu@sifive.com,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Weiwei Li <liwei1518@gmail.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH v2 2/3] hw/intc/aplic: refine the APLIC realize
Date: Wed, 26 Feb 2025 08:36:49 -0300 [thread overview]
Message-ID: <3cc3e11d-6def-4c4b-a0a5-3b3b9da9e107@ventanamicro.com> (raw)
In-Reply-To: <20250224025722.3999-3-yongxuan.wang@sifive.com>
On 2/23/25 11:57 PM, Yong-Xuan Wang wrote:
> When the APLIC is emulated in the kernel, the GPIO output lines to CPUs
> can be remove. In this case the APLIC trigger CPU interrupts by KVM APIs.
>
> This patch also move the code that claim the CPU interrupts to the
> beginning of APLIC realization. This can avoid the unnecessary resource
> allocation before checking failed.
>
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
> ---
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> hw/intc/riscv_aplic.c | 49 +++++++++++++++++++++++--------------------
> 1 file changed, 26 insertions(+), 23 deletions(-)
>
> diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
> index 0974c6a5db39..e5714267c096 100644
> --- a/hw/intc/riscv_aplic.c
> +++ b/hw/intc/riscv_aplic.c
> @@ -893,6 +893,26 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp)
> RISCVAPLICState *aplic = RISCV_APLIC(dev);
>
> if (riscv_use_emulated_aplic(aplic->msimode)) {
> + /* Create output IRQ lines for non-MSI mode */
> + if (!aplic->msimode) {
> + /* Claim the CPU interrupt to be triggered by this APLIC */
> + for (i = 0; i < aplic->num_harts; i++) {
> + RISCVCPU *cpu;
> +
> + cpu = RISCV_CPU(cpu_by_arch_id(aplic->hartid_base + i));
> + if (riscv_cpu_claim_interrupts(cpu,
> + (aplic->mmode) ? MIP_MEIP : MIP_SEIP) < 0) {
> + error_report("%s already claimed",
> + (aplic->mmode) ? "MEIP" : "SEIP");
> + exit(1);
> + }
> + }
> +
> + aplic->external_irqs = g_malloc(sizeof(qemu_irq) *
> + aplic->num_harts);
> + qdev_init_gpio_out(dev, aplic->external_irqs, aplic->num_harts);
> + }
> +
> aplic->bitfield_words = (aplic->num_irqs + 31) >> 5;
> aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs);
> aplic->state = g_new0(uint32_t, aplic->num_irqs);
> @@ -927,23 +947,6 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp)
> }
> }
>
> - /* Create output IRQ lines for non-MSI mode */
> - if (!aplic->msimode) {
> - aplic->external_irqs = g_malloc(sizeof(qemu_irq) * aplic->num_harts);
> - qdev_init_gpio_out(dev, aplic->external_irqs, aplic->num_harts);
> -
> - /* Claim the CPU interrupt to be triggered by this APLIC */
> - for (i = 0; i < aplic->num_harts; i++) {
> - RISCVCPU *cpu = RISCV_CPU(cpu_by_arch_id(aplic->hartid_base + i));
> - if (riscv_cpu_claim_interrupts(cpu,
> - (aplic->mmode) ? MIP_MEIP : MIP_SEIP) < 0) {
> - error_report("%s already claimed",
> - (aplic->mmode) ? "MEIP" : "SEIP");
> - exit(1);
> - }
> - }
> - }
> -
> msi_nonbroken = true;
> }
>
> @@ -1067,15 +1070,15 @@ DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size,
>
> if (riscv_use_emulated_aplic(msimode)) {
> sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr);
> - }
>
> - if (!msimode) {
> - for (i = 0; i < num_harts; i++) {
> - CPUState *cpu = cpu_by_arch_id(hartid_base + i);
> + if (!msimode) {
> + for (i = 0; i < num_harts; i++) {
> + CPUState *cpu = cpu_by_arch_id(hartid_base + i);
>
> - qdev_connect_gpio_out_named(dev, NULL, i,
> - qdev_get_gpio_in(DEVICE(cpu),
> + qdev_connect_gpio_out_named(dev, NULL, i,
> + qdev_get_gpio_in(DEVICE(cpu),
> (mmode) ? IRQ_M_EXT : IRQ_S_EXT));
> + }
> }
> }
>
next prev parent reply other threads:[~2025-02-26 11:37 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-24 2:57 [PATCH v2 0/3] riscv: AIA: refinement for KVM acceleration Yong-Xuan Wang
2025-02-24 2:57 ` [PATCH v2 1/3] hw/intc/imsic: refine the IMSIC realize Yong-Xuan Wang
2025-02-26 11:35 ` Daniel Henrique Barboza
2025-02-24 2:57 ` [PATCH v2 2/3] hw/intc/aplic: refine the APLIC realize Yong-Xuan Wang
2025-02-26 11:36 ` Daniel Henrique Barboza [this message]
2025-02-24 2:57 ` [PATCH v2 3/3] hw/intc/aplic: refine kvm_msicfgaddr Yong-Xuan Wang
2025-02-26 11:48 ` Daniel Henrique Barboza
2025-02-28 6:09 ` [PATCH v2 0/3] riscv: AIA: refinement for KVM acceleration Alistair Francis
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