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From: Richard Henderson <richard.henderson@linaro.org>
To: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: danielhb413@gmail.com, mark.cave-ayland@ilande.co.uk,
	pc@us.ibm.com, david@gibson.dropbear.id.au,
	matheus.ferst@eldorado.org.br, clg@kaod.org
Subject: Re: [PATCH v2 2/3] target/ppc: ppc_store_fpscr doesn't update bit 52
Date: Fri, 19 Nov 2021 10:21:05 +0100	[thread overview]
Message-ID: <3e8865b6-df3e-9b0c-aea9-810d96052255@linaro.org> (raw)
In-Reply-To: <20211118132502.984059-3-lucas.araujo@eldorado.org.br>

On 11/18/21 2:25 PM, Lucas Mateus Castro (alqotel) wrote:
> +/* FPSCR bits that can be set by mtfsf, mtfsfi and mtfsb1 */
> +#define FPSCR_MTFS_MASK (~((1ull << 11) | FP_VX | FP_FEX))

If you're going to make the reserved bit 52 read-as-zero-writes-ignored, you should do the 
same for reserved bits 0-31.  Otherwise drop this and let the bits be read-write with no 
effect.


r~


  parent reply	other threads:[~2021-11-19  9:33 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-18 13:24 [PATCH v2 0/3] Fix mtfsf, mtfsfi and mtfsb1 bug Lucas Mateus Castro (alqotel)
2021-11-18 13:25 ` [PATCH v2 1/3] target/ppc: Fixed call to deferred exception Lucas Mateus Castro (alqotel)
2021-11-19  9:18   ` Richard Henderson
2021-11-19  9:24     ` Cédric Le Goater
2021-11-19  9:48       ` Richard Henderson
2021-11-19 17:06     ` Lucas Mateus Martins Araujo e Castro
2021-11-18 13:25 ` [PATCH v2 2/3] target/ppc: ppc_store_fpscr doesn't update bit 52 Lucas Mateus Castro (alqotel)
2021-11-18 15:18   ` BALATON Zoltan
2021-11-19  9:21   ` Richard Henderson [this message]
2021-11-18 13:25 ` [PATCH v2 3/3] test/tcg/ppc64le: test mtfsf Lucas Mateus Castro (alqotel)
2021-11-19 10:00   ` Richard Henderson

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