qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Paolo Bonzini <pbonzini@redhat.com>
To: "Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Markus Armbruster" <armbru@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	qemu-devel@nongnu.org, "Eduardo Habkost" <ehabkost@redhat.com>
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Paul Burton" <pburton@wavecomp.com>,
	"Andrew Jeffery" <andrew@aj.id.au>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Andrew Baumann" <Andrew.Baumann@microsoft.com>,
	"Jean-Christophe Dubois" <jcd@tribudubois.net>,
	"Aleksandar Rikalo" <arikalo@wavecomp.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	qemu-arm@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>,
	"Antony Pavlov" <antonynpavlov@gmail.com>,
	"Aleksandar Markovic" <amarkovic@wavecomp.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Peter Chubb" <peter.chubb@nicta.com.au>,
	"David Gibson" <david@gibson.dropbear.id.au>,
	qemu-ppc@nongnu.org, "Aurelien Jarno" <aurelien@aurel32.net>,
	"Joel Stanley" <joel@jms.id.au>
Subject: Re: [Qemu-devel] [PATCH v2 12/16] hw/microblaze/zynqmp: Let the SoC manage the IPI devices
Date: Wed, 8 May 2019 13:18:09 +0200	[thread overview]
Message-ID: <3eb47444-d64d-ddfe-a9e2-59f54de76f87@redhat.com> (raw)
In-Reply-To: <20190507163416.24647-13-philmd@redhat.com>

On 07/05/19 11:34, Philippe Mathieu-Daudé wrote:
> The Inter Processor Interrupt is a block part of the SoC, not the
> "machine" (See Zynq UltraScale+ Device TRM UG1085, "Platform
> Management Unit", Power Domains and Islands).
> 
> Move the IPI management from the machine to the SoC.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
>  hw/microblaze/xlnx-zynqmp-pmu.c | 36 +++++++++++++++------------------
>  1 file changed, 16 insertions(+), 20 deletions(-)
> 
> diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
> index eba9945c19b..20e973edf5f 100644
> --- a/hw/microblaze/xlnx-zynqmp-pmu.c
> +++ b/hw/microblaze/xlnx-zynqmp-pmu.c
> @@ -68,6 +68,13 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj)
>  
>      sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
>                            TYPE_XLNX_PMU_IO_INTC);
> +
> +    /* Create the IPI device */
> +    for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
> +        object_initialize(&s->ipi[i], sizeof(XlnxZynqMPIPI),
> +                          TYPE_XLNX_ZYNQMP_IPI);
> +        qdev_set_parent_bus(DEVICE(&s->ipi[i]), sysbus_get_default());
> +    }
>  }
>  
>  static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
> @@ -113,6 +120,15 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
>      sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR);
>      sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0,
>                         qdev_get_gpio_in(DEVICE(&s->cpu), MB_CPU_IRQ));
> +
> +    /* Connect the IPI device */
> +    for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
> +        object_property_set_bool(OBJECT(&s->ipi[i]), true, "realized",
> +                                 &error_abort);
> +        sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi[i]), 0, ipi_addr[i]);
> +        sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi[i]), 0,
> +                           qdev_get_gpio_in(DEVICE(&s->intc), ipi_irq[i]));
> +    }
>  }
>  
>  static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data)
> @@ -145,8 +161,6 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine)
>      MemoryRegion *address_space_mem = get_system_memory();
>      MemoryRegion *pmu_rom = g_new(MemoryRegion, 1);
>      MemoryRegion *pmu_ram = g_new(MemoryRegion, 1);
> -    qemu_irq irq[32];
> -    int i;
>  
>      /* Create the ROM */
>      memory_region_init_rom(pmu_rom, NULL, "xlnx-zynqmp-pmu.rom",
> @@ -166,24 +180,6 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine)
>                                &error_abort);
>      object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal);
>  
> -    for (i = 0; i < 32; i++) {
> -        irq[i] = qdev_get_gpio_in(DEVICE(&pmu->intc), i);
> -    }
> -
> -    /* Create and connect the IPI device */
> -    for (i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
> -        object_initialize(&pmu->ipi[i], sizeof(XlnxZynqMPIPI),
> -                          TYPE_XLNX_ZYNQMP_IPI);
> -        qdev_set_parent_bus(DEVICE(&pmu->ipi[i]), sysbus_get_default());
> -    }
> -
> -    for (i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
> -        object_property_set_bool(OBJECT(&pmu->ipi[i]), true, "realized",
> -                                 &error_abort);
> -        sysbus_mmio_map(SYS_BUS_DEVICE(&pmu->ipi[i]), 0, ipi_addr[i]);
> -        sysbus_connect_irq(SYS_BUS_DEVICE(&pmu->ipi[i]), 0, irq[ipi_irq[i]]);
> -    }
> -
>      /* Load the kernel */
>      microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR,
>                             machine->ram_size,
> 

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>


  reply	other threads:[~2019-05-08 11:23 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-07 16:34 [Qemu-devel] [PATCH v2 00/16] hw: Use object_initialize_child for correct reference counting Philippe Mathieu-Daudé
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 01/16] hw/ppc/pnv: " Philippe Mathieu-Daudé
2019-05-08  1:23   ` David Gibson
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 02/16] hw/misc/macio: Use object_initialize_child for correct ref. counting Philippe Mathieu-Daudé
2019-05-08  1:23   ` David Gibson
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 03/16] hw/virtio: Use object_initialize_child for correct reference counting Philippe Mathieu-Daudé
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 04/16] hw/arm/bcm2835: Use TYPE_PL011 instead of hardcoded string Philippe Mathieu-Daudé
2019-05-08 11:09   ` Paolo Bonzini
2019-05-09 20:54   ` Alistair Francis
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 05/16] hw/arm/bcm2835: Use object_initialize() on PL011State Philippe Mathieu-Daudé
2019-05-08 11:09   ` Paolo Bonzini
2019-05-09 20:55   ` Alistair Francis
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 06/16] hw/arm/bcm2835: Use object_initialize_child for correct ref. counting Philippe Mathieu-Daudé
2019-05-08 11:09   ` Paolo Bonzini
2019-05-10 20:20   ` Alistair Francis
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 07/16] hw/arm/aspeed: " Philippe Mathieu-Daudé
2019-05-08 11:13   ` Paolo Bonzini
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 08/16] hw/arm: Use object_initialize_child for correct reference counting Philippe Mathieu-Daudé
2019-05-08 11:15   ` Paolo Bonzini
2019-05-10 20:44   ` Alistair Francis
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 09/16] hw/mips: Use object_initialize() on MIPSCPSState Philippe Mathieu-Daudé
2019-05-08 11:15   ` Paolo Bonzini
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 10/16] hw/mips: Use object_initialize_child for correct reference counting Philippe Mathieu-Daudé
2019-05-08 11:16   ` Paolo Bonzini
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 11/16] hw/microblaze/zynqmp: Move the IPI state into the PMUSoC state Philippe Mathieu-Daudé
2019-05-08 11:17   ` Paolo Bonzini
2019-05-10 20:45   ` Alistair Francis
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 12/16] hw/microblaze/zynqmp: Let the SoC manage the IPI devices Philippe Mathieu-Daudé
2019-05-08 11:18   ` Paolo Bonzini [this message]
2019-05-10 20:46   ` Alistair Francis
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 13/16] hw/microblaze/zynqmp: Use object_initialize_child for correct ref. counting Philippe Mathieu-Daudé
2019-05-08 11:18   ` Paolo Bonzini
2019-05-10 20:48   ` Alistair Francis
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 14/16] " Philippe Mathieu-Daudé
2019-05-08 11:19   ` Paolo Bonzini
2019-05-10 20:48   ` Alistair Francis
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 15/16] hw/arm/mps2: Use object_initialize_child for correct reference counting Philippe Mathieu-Daudé
2019-05-08 11:21   ` Paolo Bonzini
2019-05-07 16:34 ` [Qemu-devel] [PATCH v2 16/16] hw/intc/nvic: " Philippe Mathieu-Daudé
2019-05-08 11:20   ` Paolo Bonzini
2019-05-10 20:49   ` Alistair Francis
2019-05-17 10:32 ` [Qemu-devel] [PATCH v2 00/16] hw: " Philippe Mathieu-Daudé
2019-05-17 17:56   ` Eduardo Habkost
2019-05-17 18:06     ` Peter Maydell
2019-05-19 10:37     ` Aleksandar Markovic

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3eb47444-d64d-ddfe-a9e2-59f54de76f87@redhat.com \
    --to=pbonzini@redhat.com \
    --cc=Andrew.Baumann@microsoft.com \
    --cc=alistair@alistair23.me \
    --cc=amarkovic@wavecomp.com \
    --cc=andrew@aj.id.au \
    --cc=antonynpavlov@gmail.com \
    --cc=arikalo@wavecomp.com \
    --cc=armbru@redhat.com \
    --cc=aurelien@aurel32.net \
    --cc=clg@kaod.org \
    --cc=david@gibson.dropbear.id.au \
    --cc=edgar.iglesias@gmail.com \
    --cc=ehabkost@redhat.com \
    --cc=f4bug@amsat.org \
    --cc=jcd@tribudubois.net \
    --cc=joel@jms.id.au \
    --cc=mark.cave-ayland@ilande.co.uk \
    --cc=mst@redhat.com \
    --cc=pburton@wavecomp.com \
    --cc=peter.chubb@nicta.com.au \
    --cc=peter.maydell@linaro.org \
    --cc=philmd@redhat.com \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=thuth@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).