From: Eric Blake <eblake@redhat.com>
To: Michael Clark <mjc@sifive.com>, qemu-devel@nongnu.org
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Palmer Dabbelt <palmer@sifive.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
RISC-V Patches <patches@groups.riscv.org>
Subject: Re: [Qemu-devel] [PATCH v7 00/23] RISC-V QEMU Port Submission
Date: Mon, 26 Feb 2018 17:05:18 -0600 [thread overview]
Message-ID: <3f1f0ced-fced-046f-1cef-a62b057b0634@redhat.com> (raw)
In-Reply-To: <CAHNT7Nts7hHdrXe9-eVCG5h050bt=pgtTfeDGZ+BBpie3uz6wA@mail.gmail.com>
On 02/26/2018 04:24 PM, Michael Clark wrote:
> I've pushed a signed tag which includes the cover letter for the pull
> request.
>
> https://github.com/riscv/riscv-qemu/releases/tag/riscv-qemu-upstream-v7
>
> Apologies. I'm not exactly sure how to format a pull request email.
I use:
$ git request-pull origin repo $TAG | xclip
$ git send-email --confirm=always --annotate \
--subject-prefix=PULL origin
then paste in the generated cover letter to the templated 00/NN.
--
Eric Blake, Principal Software Engineer
Red Hat, Inc. +1-919-301-3266
Virtualization: qemu.org | libvirt.org
next prev parent reply other threads:[~2018-02-26 23:05 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-26 22:17 [Qemu-devel] [PATCH v7 00/23] RISC-V QEMU Port Submission Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 01/23] RISC-V Maintainers Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 02/23] RISC-V ELF Machine Definition Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 03/23] RISC-V CPU Core Definition Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 04/23] RISC-V Disassembler Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 05/23] RISC-V CPU Helpers Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 06/23] RISC-V FPU Support Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 07/23] RISC-V GDB Stub Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 08/23] RISC-V TCG Code Generation Michael Clark
2018-02-27 14:06 ` Bastian Koppelmann
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 09/23] RISC-V Physical Memory Protection Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 10/23] RISC-V Linux User Emulation Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 11/23] Add symbol table callback interface to load_elf Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 12/23] RISC-V HTIF Console Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 13/23] RISC-V HART Array Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 14/23] SiFive RISC-V CLINT Block Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 15/23] SiFive RISC-V PLIC Block Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 16/23] RISC-V Spike Machines Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 17/23] SiFive RISC-V Test Finisher Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 18/23] RISC-V VirtIO Machine Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 19/23] SiFive RISC-V UART Device Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 20/23] SiFive RISC-V PRCI Block Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 21/23] SiFive Freedom E300 RISC-V Machine Michael Clark
2018-02-26 22:17 ` [Qemu-devel] [PATCH v7 22/23] SiFive Freedom U500 " Michael Clark
2018-02-26 22:18 ` [Qemu-devel] [PATCH v7 23/23] RISC-V Build Infrastructure Michael Clark
2018-02-26 23:02 ` Eric Blake
2018-02-26 22:24 ` [Qemu-devel] [PATCH v7 00/23] RISC-V QEMU Port Submission Michael Clark
2018-02-26 23:05 ` Eric Blake [this message]
2018-02-26 22:45 ` no-reply
2018-02-26 22:57 ` no-reply
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