From: Brian Cain <brian.cain@oss.qualcomm.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
Peter Maydell <peter.maydell@linaro.org>,
Laurent Vivier <lvivier@redhat.com>,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
Alistair Francis <alistair.francis@wdc.com>,
Anton Johansson <anjo@rev.ng>, Zhao Liu <zhao1.liu@intel.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
David Hildenbrand <david@redhat.com>,
qemu-s390x@nongnu.org, Max Filippov <jcmvbkbc@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Nicholas Piggin <npiggin@gmail.com>,
qemu-arm@nongnu.org, Thomas Huth <thuth@redhat.com>,
qemu-riscv@nongnu.org, Alistair Francis <alistair@alistair23.me>,
qemu-ppc@nongnu.org,
Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [PATCH 15/20] target: Implement CPUClass::datapath_is_big_endian (big-endian)
Date: Mon, 9 Dec 2024 14:21:45 -0600 [thread overview]
Message-ID: <3fb7853c-a04e-46ba-9b69-f36012f25e26@oss.qualcomm.com> (raw)
In-Reply-To: <20241204202602.58083-16-philmd@linaro.org>
On 12/4/2024 2:25 PM, Philippe Mathieu-Daudé wrote:
> For all targets which have endianness architecturally
> predefined as big endian (built using TARGET_BIG_ENDIAN=y),
> their datapath_is_big_endian() handler simply returns %true.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/hexagon/cpu.c | 6 ++++++
> target/hppa/cpu.c | 6 ++++++
> target/m68k/cpu.c | 6 ++++++
> target/openrisc/cpu.c | 6 ++++++
> target/s390x/cpu.c | 6 ++++++
> 5 files changed, 30 insertions(+)
>
> diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
> index 020038fc490..6407ed80c59 100644
> --- a/target/hexagon/cpu.c
> +++ b/target/hexagon/cpu.c
> @@ -245,6 +245,11 @@ void hexagon_debug(CPUHexagonState *env)
> hexagon_dump(env, stdout, CPU_DUMP_FPU);
> }
>
> +static bool hexagon_cpu_datapath_is_big_endian(CPUState *cs)
> +{
> + return true;
> +}
> +
> static void hexagon_cpu_set_pc(CPUState *cs, vaddr value)
> {
> cpu_env(cs)->gpr[HEX_REG_PC] = value;
> @@ -342,6 +347,7 @@ static void hexagon_cpu_class_init(ObjectClass *c, void *data)
> &mcc->parent_phases);
>
> cc->class_by_name = hexagon_cpu_class_by_name;
> + cc->datapath_is_big_endian = hexagon_cpu_datapath_is_big_endian;
> cc->has_work = hexagon_cpu_has_work;
> cc->dump_state = hexagon_dump_state;
> cc->set_pc = hexagon_cpu_set_pc;
For hexagon:
Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com>
> diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
> index c38439c1800..8ccd224f2a4 100644
> --- a/target/hppa/cpu.c
> +++ b/target/hppa/cpu.c
> @@ -203,6 +203,11 @@ static void hppa_cpu_initfn(Object *obj)
> cpu_hppa_put_psw(env, PSW_W);
> }
>
> +static bool hppa_cpu_datapath_is_big_endian(CPUState *cs)
> +{
> + return true;
> +}
> +
> static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
> {
> g_autofree char *typename = g_strconcat(cpu_model, "-cpu", NULL);
> @@ -245,6 +250,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
> &acc->parent_realize);
>
> cc->class_by_name = hppa_cpu_class_by_name;
> + cc->datapath_is_big_endian = hppa_cpu_datapath_is_big_endian;
> cc->has_work = hppa_cpu_has_work;
> cc->mmu_index = hppa_cpu_mmu_index;
> cc->dump_state = hppa_cpu_dump_state;
> diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
> index 5fe335558aa..52f8db41d5a 100644
> --- a/target/m68k/cpu.c
> +++ b/target/m68k/cpu.c
> @@ -24,6 +24,11 @@
> #include "migration/vmstate.h"
> #include "fpu/softfloat.h"
>
> +static bool m68k_cpu_datapath_is_big_endian(CPUState *cs)
> +{
> + return true;
> +}
> +
> static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
> {
> M68kCPU *cpu = M68K_CPU(cs);
> @@ -571,6 +576,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
> &mcc->parent_phases);
>
> cc->class_by_name = m68k_cpu_class_by_name;
> + cc->datapath_is_big_endian = m68k_cpu_datapath_is_big_endian;
> cc->has_work = m68k_cpu_has_work;
> cc->mmu_index = m68k_cpu_mmu_index;
> cc->dump_state = m68k_cpu_dump_state;
> diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
> index b96561d1f26..16e39b43ec4 100644
> --- a/target/openrisc/cpu.c
> +++ b/target/openrisc/cpu.c
> @@ -25,6 +25,11 @@
> #include "fpu/softfloat-helpers.h"
> #include "tcg/tcg.h"
>
> +static bool openrisc_cpu_datapath_is_big_endian(CPUState *cs)
> +{
> + return true;
> +}
> +
> static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
> {
> OpenRISCCPU *cpu = OPENRISC_CPU(cs);
> @@ -257,6 +262,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
> &occ->parent_phases);
>
> cc->class_by_name = openrisc_cpu_class_by_name;
> + cc->datapath_is_big_endian = openrisc_cpu_datapath_is_big_endian;
> cc->has_work = openrisc_cpu_has_work;
> cc->mmu_index = openrisc_cpu_mmu_index;
> cc->dump_state = openrisc_cpu_dump_state;
> diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
> index 514c70f3010..eda1e3b286f 100644
> --- a/target/s390x/cpu.c
> +++ b/target/s390x/cpu.c
> @@ -44,6 +44,11 @@
> #define CR0_RESET 0xE0UL
> #define CR14_RESET 0xC2000000UL;
>
> +static bool s390_cpu_datapath_is_big_endian(CPUState *cs)
> +{
> + return true;
> +}
> +
> #ifndef CONFIG_USER_ONLY
> static bool is_early_exception_psw(uint64_t mask, uint64_t addr)
> {
> @@ -390,6 +395,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
> &scc->parent_phases);
>
> cc->class_by_name = s390_cpu_class_by_name,
> + cc->datapath_is_big_endian = s390_cpu_datapath_is_big_endian;
> cc->has_work = s390_cpu_has_work;
> cc->mmu_index = s390x_cpu_mmu_index;
> cc->dump_state = s390_cpu_dump_state;
next prev parent reply other threads:[~2024-12-09 20:22 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-04 20:25 [PATCH 00/20] target: Implement CPUClass::datapath_is_big_endian() handlers Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 01/20] exec/tswap: Rename target_words_bigendian -> qemu_binary_is_bigendian Philippe Mathieu-Daudé
2024-12-04 23:33 ` Richard Henderson
2024-12-04 20:25 ` [PATCH 02/20] hw/core/cpu: Introduce CPUClass::datapath_is_big_endian() handler Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 03/20] target/arm: Implement CPUClass::datapath_is_big_endian Philippe Mathieu-Daudé
2024-12-04 23:37 ` Richard Henderson
2024-12-04 20:25 ` [PATCH 04/20] target/ppc: Register CPUClass::datapath_is_big_endian Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 05/20] target/rx: Implement CPUClass::datapath_is_big_endian Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 06/20] target/sparc: " Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 07/20] target/riscv: " Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 08/20] target/sh4: Expose CPUSH4State::little_endian property Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 09/20] target/sh4: Implement CPUClass::datapath_is_big_endian Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 10/20] target/microblaze: " Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 11/20] target/mips: " Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 12/20] target/xtensa: Implement xtensa_isa_is_big_endian() Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 13/20] target/xtensa: Implement CPUClass::datapath_is_big_endian Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 14/20] target: Implement CPUClass::datapath_is_big_endian (little-endian) Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 15/20] target: Implement CPUClass::datapath_is_big_endian (big-endian) Philippe Mathieu-Daudé
2024-12-09 20:21 ` Brian Cain [this message]
2024-12-04 20:25 ` [PATCH 16/20] hw/core/cpu: Expose cpu_datapath_is_big_endian() method Philippe Mathieu-Daudé
2024-12-04 20:25 ` [PATCH 17/20] disas: Use cpu_datapath_is_big_endian() Philippe Mathieu-Daudé
2024-12-04 23:40 ` Richard Henderson
2024-12-05 10:47 ` Peter Maydell
2024-12-04 20:26 ` [PATCH 18/20] hw/core/generic-loader: " Philippe Mathieu-Daudé
2024-12-05 0:05 ` Richard Henderson
2024-12-04 20:26 ` [RFC PATCH 19/20] hw/virtio: " Philippe Mathieu-Daudé
2024-12-04 20:26 ` [PATCH 20/20] hw/core/cpu: Remove cpu_virtio_is_big_endian() Philippe Mathieu-Daudé
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