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[88.28.17.127]) by smtp.gmail.com with ESMTPSA id e6-20020a05600c218600b003f9b3588192sm9226502wme.8.2023.06.22.02.58.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 22 Jun 2023 02:58:29 -0700 (PDT) Message-ID: <405f3697-9cc8-3a19-ee79-094e6e130c29@linaro.org> Date: Thu, 22 Jun 2023 11:58:25 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH v2 1/9] accel/tcg: Store some tlb flags in CPUTLBEntryFull Content-Language: en-US To: Richard Henderson , qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org References: <20230621121902.1392277-1-richard.henderson@linaro.org> <20230621121902.1392277-2-richard.henderson@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20230621121902.1392277-2-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::229; envelope-from=philmd@linaro.org; helo=mail-lj1-x229.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.093, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 21/6/23 14:18, Richard Henderson wrote: > We have run out of bits we can use within the CPUTLBEntry comparators, > as TLB_FLAGS_MASK cannot overlap alignment. > > Store slow_flags[] in CPUTLBEntryFull, and merge with the flags from > the comparator. A new TLB_FORCE_SLOW bit is set within the comparator > as an indication that the slow path must be used. > > Move TLB_BSWAP to TLB_SLOW_FLAGS_MASK. Since we are out of bits, > we cannot create a new bit without moving an old one. > > Signed-off-by: Richard Henderson > --- > include/exec/cpu-all.h | 21 +++++++-- > include/exec/cpu-defs.h | 6 +++ > accel/tcg/cputlb.c | 96 ++++++++++++++++++++++++----------------- > 3 files changed, 80 insertions(+), 43 deletions(-) Do you mind squashing this for clarity? -- >8 -- diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index c174d5371a..c0f19e5893 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -130,3 +130,3 @@ typedef struct CPUTLBEntryFull { */ - uint8_t slow_flags[3]; + uint8_t slow_flags[MMU_ACCESS_COUNT]; diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 4871ad85f0..d07763fdeb 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -86,2 +86,3 @@ typedef enum MMUAccessType { MMU_INST_FETCH = 2 +#define MMU_ACCESS_COUNT 3 } MMUAccessType; --- Otherwise, Reviewed-by: Philippe Mathieu-Daudé