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Thu, 06 Nov 2025 08:01:05 -0800 (PST) Received: from [172.20.148.100] ([87.213.113.147]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6411f8578dfsm2135641a12.24.2025.11.06.08.01.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Nov 2025 08:01:04 -0800 (PST) Message-ID: <40afd528-ece1-42eb-8d02-d2094ebc58c9@linaro.org> Date: Thu, 6 Nov 2025 17:01:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] target/arm: Fix accidental write to TCG constant To: Peter Maydell , Gustavo Romero Cc: qemu-devel@nongnu.org, Anton Johansson References: <20251106144909.533997-1-richard.henderson@linaro.org> <5ad511f4-eb36-4d49-90a6-fbb1e5f67c6c@linaro.org> From: Richard Henderson Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=richard.henderson@linaro.org; helo=mail-ed1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 11/6/25 16:57, Peter Maydell wrote: > On Thu, 6 Nov 2025 at 15:48, Gustavo Romero wrote: >> >> Hi folks, >> >> On 11/6/25 15:49, Richard Henderson wrote: >>> Currently an unpredictable movw such as >>> >>> movw pc, 0x123 >> >> bah, how did you get this insn.? Are you using any fuzzer? :P >> >> >>> results in the tinycode >>> >>> and_i32 $0x123,$0x123,$0xfffffffc >>> mov_i32 pc,$0x123 >>> exit_tb $0x0 >>> >>> which is clearly a bug, writing to a constant is incorrect and discards >>> the result of the mask. Fix this by adding a temporary in store_reg(). > >> The difference between v1 and v2 is: >> >> v1: >> mov_i32 tmp3,$0x123 >> and_i32 tmp3,tmp3,$0xfffffffc >> mov_i32 pc,tmp3 >> >> v2 (this version) >> and_i32 pc,$0x123,$0xfffffffc >> >> >> I think we need only a v3 that updates the commit message since we >> are not adding a temporary anymore. >> >> Interestingly, I was not able to crash the host when native code >> was generated from: >> >> and_i32 $0x123,$0x123,$0xfffffffc > > The commit message doesn't say this crashes, it says it > discards the result of the mask. (That is, we intended to > clear the low bits of the guest PC but don't.) > > Should there be a TCG debug assert for "TCGv for the > result of an operation is a constant" ? There is, at least with --enable-debug-tcg. I assumed there was a crash from the description, but I haven't yet tried the test case Gustavo put together. r~