From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, alex.bennee@linaro.org, stefanha@redhat.com,
david@redhat.com
Subject: Re: [PATCH v4 00/16] Move rom and notdirty handling to cputlb
Date: Wed, 25 Sep 2019 19:52:13 +0100 [thread overview]
Message-ID: <40d681ef-4566-a19b-ee4f-063660dfdc3a@ilande.co.uk> (raw)
In-Reply-To: <20190923230004.9231-1-richard.henderson@linaro.org>
On 23/09/2019 23:59, Richard Henderson wrote:
> Changes since v3:
> * Don't accidentally include the TARGET_PAGE_BITS_VARY patch set. ;-)
> * Remove __has_attribute(__always_inline__).
> * Use single load/store_memop function instead of separate small wrappers.
> * Introduce optimize_away to assert the code folds away as expected.
>
> Patches without review:
>
> 0003-qemu-compiler.h-Add-optimize_away.patch
> 0004-cputlb-Use-optimize_away-in-load-store_helpers.patch
> 0005-cputlb-Split-out-load-store_memop.patch
> 0010-cputlb-Partially-inline-memory_region_section_get.patch
> 0011-cputlb-Merge-and-move-memory_notdirty_write_-prep.patch
> 0012-cputlb-Handle-TLB_NOTDIRTY-in-probe_access.patch
>
>
> r~
>
>
> Richard Henderson (16):
> exec: Use TARGET_PAGE_BITS_MIN for TLB flags
> cputlb: Disable __always_inline__ without optimization
> qemu/compiler.h: Add optimize_away
> cputlb: Use optimize_away in load/store_helpers
> cputlb: Split out load/store_memop
> cputlb: Introduce TLB_BSWAP
> exec: Adjust notdirty tracing
> cputlb: Move ROM handling from I/O path to TLB path
> cputlb: Move NOTDIRTY handling from I/O path to TLB path
> cputlb: Partially inline memory_region_section_get_iotlb
> cputlb: Merge and move memory_notdirty_write_{prepare,complete}
> cputlb: Handle TLB_NOTDIRTY in probe_access
> cputlb: Remove cpu->mem_io_vaddr
> cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access
> cputlb: Pass retaddr to tb_invalidate_phys_page_fast
> cputlb: Pass retaddr to tb_check_watchpoint
>
> accel/tcg/translate-all.h | 8 +-
> include/exec/cpu-all.h | 23 ++-
> include/exec/cpu-common.h | 3 -
> include/exec/exec-all.h | 6 +-
> include/exec/memory-internal.h | 65 -------
> include/hw/core/cpu.h | 2 -
> include/qemu/compiler.h | 26 +++
> accel/tcg/cputlb.c | 340 +++++++++++++++++++--------------
> accel/tcg/translate-all.c | 51 +++--
> exec.c | 158 +--------------
> hw/core/cpu.c | 1 -
> memory.c | 20 --
> trace-events | 4 +-
> 13 files changed, 279 insertions(+), 428 deletions(-)
Am I right in thinking that this is now the latest version of the patchset which
fixes up the byte swaps in RAM?
I'm not sure that I can offer much in the way of review, however is there any testing
I can do to help out here?
ATB,
Mark.
next prev parent reply other threads:[~2019-09-25 19:02 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-23 22:59 [PATCH v4 00/16] Move rom and notdirty handling to cputlb Richard Henderson
2019-09-23 22:59 ` [PATCH v4 01/16] exec: Use TARGET_PAGE_BITS_MIN for TLB flags Richard Henderson
2019-09-24 13:53 ` Alex Bennée
2019-09-23 22:59 ` [PATCH v4 02/16] cputlb: Disable __always_inline__ without optimization Richard Henderson
2019-09-24 13:56 ` Alex Bennée
2019-09-23 22:59 ` [PATCH v4 03/16] qemu/compiler.h: Add optimize_away Richard Henderson
2019-09-24 7:47 ` David Hildenbrand
2019-09-24 17:27 ` Richard Henderson
2019-09-24 17:29 ` David Hildenbrand
2019-09-24 15:47 ` Alex Bennée
2019-09-23 22:59 ` [PATCH v4 04/16] cputlb: Use optimize_away in load/store_helpers Richard Henderson
2019-09-24 7:47 ` David Hildenbrand
2019-09-24 15:47 ` Alex Bennée
2019-09-23 22:59 ` [PATCH v4 05/16] cputlb: Split out load/store_memop Richard Henderson
2019-09-24 7:48 ` David Hildenbrand
2019-09-24 15:51 ` Alex Bennée
2019-09-23 22:59 ` [PATCH v4 06/16] cputlb: Introduce TLB_BSWAP Richard Henderson
2019-09-24 18:25 ` Alex Bennée
2019-09-25 17:36 ` Richard Henderson
2019-09-23 22:59 ` [PATCH v4 07/16] exec: Adjust notdirty tracing Richard Henderson
2019-09-24 21:53 ` Alex Bennée
2019-09-23 22:59 ` [PATCH v4 08/16] cputlb: Move ROM handling from I/O path to TLB path Richard Henderson
2019-09-25 0:16 ` Alex Bennée
2019-09-25 6:59 ` David Hildenbrand
2019-09-25 16:01 ` Alex Bennée
2019-09-25 17:01 ` Richard Henderson
2019-09-23 22:59 ` [PATCH v4 09/16] cputlb: Move NOTDIRTY " Richard Henderson
2019-09-25 16:06 ` Alex Bennée
2019-09-23 22:59 ` [PATCH v4 10/16] cputlb: Partially inline memory_region_section_get_iotlb Richard Henderson
2019-09-24 7:59 ` David Hildenbrand
2019-09-25 17:55 ` Richard Henderson
2019-09-25 19:40 ` David Hildenbrand
2019-09-25 16:12 ` Alex Bennée
2019-09-23 22:59 ` [PATCH v4 11/16] cputlb: Merge and move memory_notdirty_write_{prepare, complete} Richard Henderson
2019-09-24 8:04 ` [PATCH v4 11/16] cputlb: Merge and move memory_notdirty_write_{prepare,complete} David Hildenbrand
2019-09-25 16:15 ` Alex Bennée
2019-09-23 23:00 ` [PATCH v4 12/16] cputlb: Handle TLB_NOTDIRTY in probe_access Richard Henderson
2019-09-24 8:05 ` David Hildenbrand
2019-09-25 16:21 ` Alex Bennée
2019-09-23 23:00 ` [PATCH v4 13/16] cputlb: Remove cpu->mem_io_vaddr Richard Henderson
2019-09-25 16:22 ` Alex Bennée
2019-09-23 23:00 ` [PATCH v4 14/16] cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access Richard Henderson
2019-09-25 16:23 ` Alex Bennée
2019-09-23 23:00 ` [PATCH v4 15/16] cputlb: Pass retaddr to tb_invalidate_phys_page_fast Richard Henderson
2019-09-25 16:28 ` Alex Bennée
2019-09-23 23:00 ` [PATCH v4 16/16] cputlb: Pass retaddr to tb_check_watchpoint Richard Henderson
2019-09-25 16:30 ` Alex Bennée
2019-09-25 18:52 ` Mark Cave-Ayland [this message]
2019-09-25 18:54 ` [PATCH v4 00/16] Move rom and notdirty handling to cputlb Mark Cave-Ayland
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