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Wed, 13 Oct 2021 12:57:22 -0700 (PDT) Subject: Re: [PATCH] target/riscv: Fix orc.b implementation To: Philipp Tomsich , qemu-devel@nongnu.org References: <20211013184125.2010897-1-philipp.tomsich@vrull.eu> From: Richard Henderson Message-ID: <40e5e474-dac9-9b58-655e-53d7cc01231b@linaro.org> Date: Wed, 13 Oct 2021 12:57:20 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211013184125.2010897-1-philipp.tomsich@vrull.eu> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Vincent Palatin Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/13/21 11:41 AM, Philipp Tomsich wrote: > The earlier implementation fell into a corner case for bytes that were > 0x01, giving a wrong result (but not affecting our application test > cases for strings, as an ASCII value 0x01 is rare in those...). > > This changes the algorithm to: > 1. Mask out the high-bit of each bytes (so that each byte is <= 127). > 2. Add 127 to each byte (i.e. if the low 7 bits are not 0, this will overflow > into the highest bit of each byte). > 3. Bitwise-or the original value back in (to cover those cases where the > source byte was exactly 128) to saturate the high-bit. > 4. Shift-and-mask (implemented as a mask-and-shift) to extract the MSB of > each byte into its LSB. > 5. Multiply with 0xff to fan out the LSB to all bits of each byte. > > Fixes: d7a4fcb034 ("target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci") > > Signed-off-by: Philipp Tomsich > Reported-by: Vincent Palatin > > --- Reviewed-by: Richard Henderson r~