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References: <20190212110308.13707-1-david@redhat.com>
	<20190212110308.13707-7-david@redhat.com>
From: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <41289512-aadf-d7a6-64e1-e597d3835697@linaro.org>
Date: Tue, 12 Feb 2019 10:14:42 -0800
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Subject: Re: [Qemu-devel] [PATCH v1 05/15] s390x/tcg: Hide IEEE underflows
 in some scenarios
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To: David Hildenbrand <david@redhat.com>, qemu-devel@nongnu.org
Cc: Thomas Huth <thuth@redhat.com>, Janosch Frank <frankja@linux.ibm.com>, Cornelia Huck <cohuck@redhat.com>, Halil Pasic <pasic@linux.ibm.com>, Christian Borntraeger <borntraeger@de.ibm.com>, qemu-s390x@nongnu.org, Richard Henderson <rth@twiddle.net>

On 2/12/19 3:02 AM, David Hildenbrand wrote:
> IEEE underflows are not reported when the mask bit is off and we don't
> also have an inexact exception.
> 
> z14 PoP, 9-20, "IEEE Underflow":
>     An IEEE-underflow exception is recognized for an
>     IEEE target when the tininess condition exists and
>     either: (1) the IEEE-underflow mask bit in the FPC
>     register is zero and the result value is inexact, or (2)
>     the IEEE-underflow mask bit in the FPC register is
>     one.
> 
> Signed-off-by: David Hildenbrand <david@redhat.com>
> ---
>  target/s390x/fpu_helper.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~