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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id s135-20020a63778d000000b0038259e54389sm3427900pgc.19.2022.03.20.12.21.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 20 Mar 2022 12:21:05 -0700 (PDT) Message-ID: <413ffde7-9e24-8047-7d77-f14769808d73@linaro.org> Date: Sun, 20 Mar 2022 12:21:03 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH 2/2] fix lock cmpxchg instruction Content-Language: en-US To: Wei Li , pbonzini@redhat.com, eduardo@habkost.net References: <20220319160658.336882-1-lw945lw945@yahoo.com> <20220319160658.336882-3-lw945lw945@yahoo.com> From: Richard Henderson In-Reply-To: <20220319160658.336882-3-lw945lw945@yahoo.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42b (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/19/22 09:06, Wei Li wrote: > For lock cmpxchg, the situation is more complex. After the instruction > is completed by tcg_gen_atomic_cmpxchg_tl, it needs a branch to judge > if oldv == cmpv or not. The instruction only touches accumulator when > oldv != cmpv. > > Signed-off-by: Wei Li > --- > target/i386/tcg/translate.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c > index 05be8d08e6..4fd9c03cb7 100644 > --- a/target/i386/tcg/translate.c > +++ b/target/i386/tcg/translate.c > @@ -5360,7 +5360,12 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) > gen_lea_modrm(env, s, modrm); > tcg_gen_atomic_cmpxchg_tl(oldv, s->A0, cmpv, newv, > s->mem_index, ot | MO_LE); > + label1 = gen_new_label(); > + gen_extu(ot, oldv); > + gen_extu(ot, cmpv); > + tcg_gen_brcond_tl(TCG_COND_EQ, oldv, cmpv, label1); > gen_op_mov_reg_v(s, ot, R_EAX, oldv); This is better addressed with a movcond: TCGv temp = tcg_temp_new(); tcg_gen_mov_tl(temp, cpu_regs[R_EAX]); /* Perform the merge into %al or %ax as required by ot. */ gen_op_mov_reg_v(s, ot, R_EAX, oldv); /* Undo the entire modification to %rax if comparison equal. */ tcg_gen_movcond_tl(TCG_COND_EQ, cpu_regs[R_EAX], oldv, cmpv, cpu_regs[R_EAX], temp); tcg_temp_free(temp); r~