From: Laszlo Ersek <lersek@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: Re: [Qemu-devel] [PULL 08/10] target/arm: Conditionalize some asserts on aarch32 support
Date: Tue, 16 Jul 2019 18:50:56 +0200 [thread overview]
Message-ID: <417cd887-aec4-d8ba-1dd2-810bc4c04977@redhat.com> (raw)
In-Reply-To: <CAFEAcA_FtoHOUv_cPgfO7GrZ8Ug9cKCvmY2z75i9DaAQ8Qx+gQ@mail.gmail.com>
On 07/16/19 14:03, Peter Maydell wrote:
> On Fri, 24 May 2019 at 13:33, Laszlo Ersek <lersek@redhat.com> wrote:
>> On 11/02/18 18:16, Peter Maydell wrote:
>>> @@ -829,7 +840,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
>>> * Presence of EL2 itself is ARM_FEATURE_EL2, and of the
>>> * Security Extensions is ARM_FEATURE_EL3.
>>> */
>>> - assert(cpu_isar_feature(arm_div, cpu));
>>> + assert(no_aa32 || cpu_isar_feature(arm_div, cpu));
>>
>> The assertion above fails on my AArch64 host (APM Mustang A3). Meaning
>> that my host CPU supports AArch32, but lacks "arm_div".
>
> Hi; I just realized we left this assertion-failure bug report
> unaddressed, so I had a look at it.
Yes, it's also tracked under LP#1830864; thanks for looking into it.
>
> I tried to repro on my Mustang, but this works for me.
> A CPU with AArch32 but without the Arm-mode division instructions
> would be non-compliant (and very obviously so if tested), so
> I suspect the actual problem is not with the hardware but with
> the kernel not correctly reporting the ID registers to QEMU.
> What kernel version are you using?
So, I've just retested, with the QEMU binary I've left around from last
time. (This QEMU binary was built at upstream commit d247c8e7f4fc, with
Phil's v2 series applied on top, for regression testing:
[PATCH v2 0/9] hw/block/pflash_cfi01: Add DeviceReset() handler
http://mid.mail-archive.com/38281fa7-30f4-60ec-3357-3e1613c44dbe@redhat.com
)
The issue still reproduces, so it makes sense for me to look at the host
kernel version... Well, I'm afraid it won't help much, for an upstream
investigation:
4.14.0-115.8.2.el7a.aarch64
This is the latest released kernel from "Red Hat Enterprise Linux for
ARM 64 7".
Thanks!
Laszlo
>> Better yet: can we rework the code to emit a warning, rather than
>> aborting QEMU? Assertions are not the best tool IMHO for catching
>> unusual (or slightly non-conformant / early) hardware.)
>
> The intention of the assertion really is to catch QEMU bugs
> where we got the ID register values wrong in our emulated
> CPUs. Perhaps we should relax all these assertions to only
> testing if we're using TCG, not KVM ?
>
> thanks
> -- PMM
>
next prev parent reply other threads:[~2019-07-16 16:51 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-02 17:16 [Qemu-devel] [PULL v3 00/10] target-arm queue Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 01/10] hw/arm/virt: Set VIRT_COMPAT_3_0 compat Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 02/10] hw/char: Implement nRF51 SoC UART Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 03/10] hw/arm/nrf51_soc: Connect UART to nRF51 SoC Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 04/10] tests/boot-serial-test: Add microbit board testcase Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 05/10] MAINTAINERS: Remove bouncing email in ARM ACPI Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 06/10] strongarm: mask off high[31:28] bits from dir and state registers Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 07/10] hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 08/10] target/arm: Conditionalize some asserts on aarch32 support Peter Maydell
2019-05-24 12:33 ` Laszlo Ersek
2019-05-24 12:45 ` Laszlo Ersek
2019-05-24 13:11 ` Philippe Mathieu-Daudé
2019-07-16 12:03 ` Peter Maydell
2019-07-16 14:02 ` Richard Henderson
2019-07-16 14:18 ` Peter Maydell
2019-07-16 15:04 ` Richard Henderson
2019-07-16 16:50 ` Laszlo Ersek [this message]
2019-07-16 16:59 ` Peter Maydell
2019-07-16 18:42 ` Laszlo Ersek
2019-07-16 20:10 ` Philippe Mathieu-Daudé
2019-07-17 8:36 ` Laszlo Ersek
2019-07-17 9:22 ` Laszlo Ersek
2019-07-17 9:24 ` Laszlo Ersek
2019-07-17 12:49 ` Laszlo Ersek
2019-07-17 12:53 ` Laszlo Ersek
2019-07-17 13:36 ` Philippe Mathieu-Daudé
2019-07-17 13:46 ` Peter Maydell
2019-07-17 15:08 ` Laszlo Ersek
2019-07-18 12:30 ` Peter Maydell
2019-07-18 19:07 ` Laszlo Ersek
2019-07-17 13:45 ` Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 09/10] hw/arm: versal: Add a model of Xilinx Versal SoC Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 10/10] hw/arm: versal: Add a virtual Xilinx Versal board Peter Maydell
2018-12-04 10:28 ` Peter Maydell
2018-12-12 22:05 ` Edgar E. Iglesias
2022-01-27 13:10 ` Peter Maydell
2022-01-30 10:33 ` Edgar E. Iglesias
2018-11-02 18:22 ` [Qemu-devel] [PULL v3 00/10] target-arm queue Peter Maydell
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