From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.33) id 1CZGqM-0002dP-Q0 for qemu-devel@nongnu.org; Tue, 30 Nov 2004 17:51:35 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.33) id 1CZGqJ-0002a6-KG for qemu-devel@nongnu.org; Tue, 30 Nov 2004 17:51:31 -0500 Received: from [129.104.30.34] (helo=mx1.polytechnique.org) by monty-python.gnu.org with esmtp (Exim 4.34) id 1CZGey-0003Yh-QB for qemu-devel@nongnu.org; Tue, 30 Nov 2004 17:39:49 -0500 Received: from localhost (localhost [127.0.0.1]) by djali.polytechnique.org (Postfix) with ESMTP id 982E333251 for ; Tue, 30 Nov 2004 23:39:47 +0100 (CET) Received: from djali.polytechnique.org ([127.0.0.1]) by localhost (localhost [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 01845-04 for ; Tue, 30 Nov 2004 23:39:47 +0100 (CET) Received: from bellard.org (unknown [84.99.204.62]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ssl.polytechnique.org (Postfix) with ESMTP id 50FF333204 for ; Tue, 30 Nov 2004 23:39:47 +0100 (CET) Message-ID: <41ACF6C8.8040302@bellard.org> Date: Tue, 30 Nov 2004 23:40:08 +0100 From: Fabrice Bellard MIME-Version: 1.0 Subject: Re: [Qemu-devel] Block chaining question References: <200411281718.04223.a_mulyadi@softhome.net> In-Reply-To: Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Shivkumar Shivaji wrote: > Hi, > I have done a quick perusal of the code. I was wondering if block > chaining is performed for conditional jumps? If I want to implement such > a feature would it have to be done in dyngen? I saw references to > __op_jmp and cond_jump. However, there does not seem to be chaining > based on conditional jumps. Am I right? Block chaining is done on conditional jumps too, but it could be more optimised with more host specific assembly code. Fabrice.