From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.33) id 1CgWtl-0002AW-Lp for qemu-devel@nongnu.org; Mon, 20 Dec 2004 18:25:05 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.33) id 1CgWtk-0002AN-VQ for qemu-devel@nongnu.org; Mon, 20 Dec 2004 18:25:05 -0500 Received: from [129.104.30.34] (helo=mx1.polytechnique.org) by monty-python.gnu.org with esmtp (Exim 4.34) id 1CgWfj-0000L1-T1 for qemu-devel@nongnu.org; Mon, 20 Dec 2004 18:10:36 -0500 Message-ID: <41C75C0A.5070102@bellard.org> Date: Tue, 21 Dec 2004 00:11:06 +0100 From: Fabrice Bellard MIME-Version: 1.0 Subject: Re: [Qemu-devel] Re: [PATCH] CONFIG_MMU_MAP powerpc host support References: In-Reply-To: Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Piotras , qemu-devel@nongnu.org Piotras wrote: > Great! > > Do you have an estimate of possible performance gain by introducing > direct pointer to mmu_map for memory read? > > I have two ideas for future experimentation. > > There is a trick possible without wasting another register for global > variable: use two copies of CPUState (one for privileged and another > for user mode), then make mmu_map.add_read first member of the > struct. This would introduce guest register coping for user/supervisor > switch, but maybe performance gain would justify this. > Another idea: if we could align add_read/add_write on 64k boundary, > "addi" could be removed. IMHO, using a single global register and interleaving the 4 access types is the best solution... Fabrice.