From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.33) id 1ClcZN-00084c-MQ for qemu-devel@nongnu.org; Mon, 03 Jan 2005 19:29:05 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.33) id 1ClcZN-00084F-5U for qemu-devel@nongnu.org; Mon, 03 Jan 2005 19:29:05 -0500 Received: from [129.104.30.34] (helo=mx1.polytechnique.org) by monty-python.gnu.org with esmtp (Exim 4.34) id 1ClcO5-0007th-1j for qemu-devel@nongnu.org; Mon, 03 Jan 2005 19:17:25 -0500 Received: from localhost (localhost [127.0.0.1]) by djali.polytechnique.org (Postfix) with ESMTP id 4F75F33190 for ; Tue, 4 Jan 2005 01:17:24 +0100 (CET) Received: from djali.polytechnique.org ([127.0.0.1]) by localhost (localhost [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 13611-02 for ; Tue, 4 Jan 2005 01:17:24 +0100 (CET) Received: from [84.99.204.192] (unknown [84.99.204.192]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ssl.polytechnique.org (Postfix) with ESMTP id 1EB853316E for ; Tue, 4 Jan 2005 01:17:24 +0100 (CET) Message-ID: <41D9E0BB.1070202@bellard.org> Date: Tue, 04 Jan 2005 01:18:03 +0100 From: Fabrice Bellard MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] x86_64 target Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Hi, As a small gift for this new year, here is an initial implementation of the x86_64 target in QEMU. It is a "work in progress" as usual, but it works enough to boot an x86_64 Linux kernel (I used the one available at http://bochs.sourceforge.net/guestos/linux.x86-64.bzImage). Although the x86_64 target works correctly on 32 bit hosts, it is designed to have the best performances on 64 bit hosts, such as x86_64 or ppc64. The current speed is poor relatively to the i386 emulation because I did not enable register usage on 64 bit hosts (no time to test it yet). The biggest missing part is a full implementation of SSE - I only added the minimal subset for the Linux kernel. I won't work again on the x86_64 target in the near future (as I said earlier most of my time is dedicated on improving the x86 on x86 speed), but anyone is free to submit patches. Fabrice.