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From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: "Jamin Lin" <jamin_lin@aspeedtech.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>, "Joel Stanley" <joel@jms.id.au>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Bin Meng" <bmeng.cn@gmail.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>,
	"open list:SD (Secure Card)" <qemu-block@nongnu.org>
Cc: troy_lee@aspeedtech.com, yunlin.tang@aspeedtech.com
Subject: Re: [PATCH v1 5/8] hw/sd/sdhci: Introduce a new Write Protected pin inverted property
Date: Wed, 30 Oct 2024 10:20:44 +1030	[thread overview]
Message-ID: <41d563a4c0de07ad4cc363c6a3599734608454a9.camel@codeconstruct.com.au> (raw)
In-Reply-To: <20241029091729.3317512-6-jamin_lin@aspeedtech.com>

On Tue, 2024-10-29 at 17:17 +0800, Jamin Lin wrote:
> The Write Protect pin of SDHCI model is default active low to match
> the SDHCI
> spec. So, write enable the bit 19 should be 1 and write protected the
> bit 19
> should be 0 at the Present State Register (0x24). However, some board
> are
> design Write Protected pin active high. In other words, write enable
> the bit 19
> should be 0 and write protected the bit 19 should be 1 at the
> Present State Register (0x24). To support it, introduces a new
> "wp_invert"
> property and set it false by default.
> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
>  hw/sd/sdhci.c         | 6 ++++++
>  include/hw/sd/sdhci.h | 5 +++++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index db7d547156..bdf5cbfb80 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -275,6 +275,10 @@ static void sdhci_set_readonly(DeviceState *dev,
> bool level)
>  {
>      SDHCIState *s = (SDHCIState *)dev;
>  
> +    if (s->wp_invert) {
> +        level = !level;
> +    }
> +
>      if (level) {
>          s->prnsts &= ~SDHC_WRITE_PROTECT;
>      } else {
> @@ -1551,6 +1555,8 @@ static Property sdhci_sysbus_properties[] = {
>                       false),
>      DEFINE_PROP_LINK("dma", SDHCIState,
>                       dma_mr, TYPE_MEMORY_REGION, MemoryRegion *),
> +    DEFINE_PROP_BOOL("wp-invert", SDHCIState,

Can we line the name up with the mmc-controller devicetree binding
("wp-inverted")?

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/mmc/mmc-controller.yaml#n71

Andrew

> +                     wp_invert, false),
>      DEFINE_PROP_END_OF_LIST(),
>  };
>  
> diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
> index 6cd2822f1d..d68f4788e7 100644
> --- a/include/hw/sd/sdhci.h
> +++ b/include/hw/sd/sdhci.h
> @@ -100,6 +100,11 @@ struct SDHCIState {
>      uint8_t sd_spec_version;
>      uint8_t uhs_mode;
>      uint8_t vendor;        /* For vendor specific functionality */
> +    /*
> +     * Write Protect pin default active low for detecting SD card
> +     * to be protected. Set wp_invert to true inverted the signal.
> +     */
> +    bool wp_invert;
>  };
>  typedef struct SDHCIState SDHCIState;
>  



  reply	other threads:[~2024-10-29 23:51 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-29  9:17 [PATCH v1 0/8] Support RTC for AST2700 Jamin Lin via
2024-10-29  9:17 ` [PATCH v1 1/8] aspeed/soc: " Jamin Lin via
2024-11-02 14:59   ` [SPAM] " Cédric Le Goater
2024-10-29  9:17 ` [PATCH v1 2/8] hw/timer/aspeed: Fix coding style Jamin Lin via
2024-11-02 15:01   ` [SPAM] " Cédric Le Goater
2024-10-29  9:17 ` [PATCH v1 3/8] hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600 Jamin Lin via
2024-10-29 23:43   ` Andrew Jeffery
2024-11-02 14:59   ` [SPAM] " Cédric Le Goater
2024-10-29  9:17 ` [PATCH v1 4/8] hw/sd/sdhci: Fix coding style Jamin Lin via
2024-11-02 15:00   ` [SPAM] " Cédric Le Goater
2024-10-29  9:17 ` [PATCH v1 5/8] hw/sd/sdhci: Introduce a new Write Protected pin inverted property Jamin Lin via
2024-10-29 23:50   ` Andrew Jeffery [this message]
2024-10-30  2:10     ` Jamin Lin
2024-10-29  9:17 ` [PATCH v1 6/8] hw/sd/aspeed_sdhci: Introduce Capabilities Register 2 for SD slot 0 and 1 Jamin Lin via
2024-11-02 15:02   ` [SPAM] " Cédric Le Goater
2024-11-04 10:28   ` Philippe Mathieu-Daudé
2024-10-29  9:17 ` [PATCH v1 7/8] hw/arm/aspeed: Invert sdhci write protected pin for AST2600 and AST2500 EVBs Jamin Lin via
2024-10-30  0:20   ` Andrew Jeffery
2024-10-30  2:31     ` Jamin Lin
2024-10-29  9:17 ` [PATCH v1 8/8] aspeed: Support create flash devices via command line for AST1030 Jamin Lin via
2024-11-02 15:02   ` [SPAM] " Cédric Le Goater
2024-11-02 15:03 ` [SPAM] [PATCH v1 0/8] Support RTC for AST2700 Cédric Le Goater
2024-11-04  1:16   ` Jamin Lin

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