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From: Damien Hedde <damien.hedde@greensocs.com>
To: "Philippe Mathieu-Daudé" <philippe.mathieu.daude@gmail.com>,
	qemu-devel@nongnu.org, mark.burton@greensocs.com,
	edgari@xilinx.com
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [PATCH v4 08/14] none-machine: add 'ram-addr' property
Date: Thu, 3 Mar 2022 17:19:24 +0100	[thread overview]
Message-ID: <427eea9e-710e-cadb-e87f-85c723674662@greensocs.com> (raw)
In-Reply-To: <5f0b5304-359b-1cc6-6ea0-57ba6b0947f0@gmail.com>



On 3/3/22 15:41, Philippe Mathieu-Daudé wrote:
> On 23/2/22 10:07, Damien Hedde wrote:
>> Add the property to configure a the base address of the ram.
>> The default value remains zero.
>>
>> This commit is needed to use the 'none' machine as a base, and
>> subsequently to dynamically populate it using qapi commands. Having
>> a non null 'ram' is really hard to workaround because of the actual
>> constraints on the generic loader: it prevents loading binaries
>> bigger than ram_size (with a null ram, we cannot load anything).
>> For now we need to be able to use the existing ram creation
>> feature of the none machine with a configurable base address.
>>
>> Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
>> ---
>>   hw/core/null-machine.c | 34 ++++++++++++++++++++++++++++++++--
>>   1 file changed, 32 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
>> index 7eb258af07..5fd1cc0218 100644
>> --- a/hw/core/null-machine.c
>> +++ b/hw/core/null-machine.c
>> @@ -16,9 +16,11 @@
>>   #include "hw/boards.h"
>>   #include "exec/address-spaces.h"
>>   #include "hw/core/cpu.h"
>> +#include "qapi/visitor.h"
>>   struct NoneMachineState {
>>       MachineState parent;
>> +    uint64_t ram_addr;
>>   };
>>   #define TYPE_NONE_MACHINE MACHINE_TYPE_NAME("none")
>> @@ -26,6 +28,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(NoneMachineState, 
>> NONE_MACHINE)
>>   static void machine_none_init(MachineState *mch)
>>   {
>> +    NoneMachineState *nms = NONE_MACHINE(mch);
>>       CPUState *cpu = NULL;
>>       /* Initialize CPU (if user asked for it) */
>> @@ -37,9 +40,13 @@ static void machine_none_init(MachineState *mch)
>>           }
>>       }
>> -    /* RAM at address zero */
>> +    /* RAM at configured address (default: 0) */
>>       if (mch->ram) {
>> -        memory_region_add_subregion(get_system_memory(), 0, mch->ram);
>> +        memory_region_add_subregion(get_system_memory(), nms->ram_addr,
>> +                                    mch->ram);
>> +    } else if (nms->ram_addr) {
>> +        error_report("'ram-addr' has been specified but the size is 
>> zero");
> 
> I'm not sure about this error message, IIUC we can get here if no ram
> backend is provided, not if we have one zero-sized. Otherwise LGTM.

You're most probably right. Keeping the ram_size to 0 is just one way of 
getting here. I can replace the message by a more generic formulation
"'ram-addr' has been specified but the machine has no ram"



  reply	other threads:[~2022-03-03 16:40 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-23  9:06 [PATCH v4 00/14] Initial support for machine creation via QMP Damien Hedde
2022-02-23  9:06 ` [PATCH v4 01/14] machine: add phase_get() and document phase_check()/advance() Damien Hedde
2022-03-03 15:01   ` Philippe Mathieu-Daudé
2022-02-23  9:06 ` [PATCH v4 02/14] machine&vl: introduce phase_until() to handle phase transitions Damien Hedde
2022-03-18 13:29   ` Damien Hedde
2022-02-23  9:06 ` [PATCH v4 03/14] vl: support machine-initialized target in phase_until() Damien Hedde
2022-03-03 15:03   ` Philippe Mathieu-Daudé
2022-02-23  9:06 ` [PATCH v4 04/14] qapi/device_add: compute is_hotplug flag Damien Hedde
2022-03-03 15:04   ` Philippe Mathieu-Daudé
2022-02-23  9:06 ` [PATCH v4 05/14] qapi/device_add: handle the rom_order_override when cold-plugging Damien Hedde
2022-05-24 20:08   ` Jim Shu
2022-02-23  9:06 ` [PATCH v4 06/14] qapi/device_add: Allow execution in machine initialized phase Damien Hedde
2022-02-23  9:06 ` [PATCH v4 07/14] none-machine: add the NoneMachineState structure Damien Hedde
2022-03-03 14:36   ` Philippe Mathieu-Daudé
2022-05-24 20:09   ` Jim Shu
2022-02-23  9:07 ` [PATCH v4 08/14] none-machine: add 'ram-addr' property Damien Hedde
2022-03-03 14:41   ` Philippe Mathieu-Daudé
2022-03-03 16:19     ` Damien Hedde [this message]
2022-05-24 20:09       ` Jim Shu
2022-02-23  9:07 ` [PATCH v4 09/14] none-machine: allow cold plugging sysbus devices Damien Hedde
2022-03-03 14:44   ` Philippe Mathieu-Daudé
2022-05-24 20:09     ` Jim Shu
2022-02-23  9:07 ` [PATCH v4 10/14] none-machine: allow several cpus Damien Hedde
2022-02-23  9:07 ` [PATCH v4 11/14] softmmu/memory: add memory_region_try_add_subregion function Damien Hedde
2022-02-23  9:12   ` Damien Hedde
2022-03-03 13:32     ` Philippe Mathieu-Daudé
2022-03-04 10:53       ` Damien Hedde
2022-05-24 20:09         ` Jim Shu
2022-02-23  9:07 ` [PATCH v4 12/14] add sysbus-mmio-map qapi command Damien Hedde
2022-03-03 14:59   ` Philippe Mathieu-Daudé
2022-03-04 10:42     ` Damien Hedde
2022-05-24 20:09   ` Jim Shu
2022-02-23  9:07 ` [PATCH v4 13/14] hw/mem/system-memory: add a memory sysbus device Damien Hedde
2022-02-23  9:44   ` Igor Mammedov
2022-02-23 10:19     ` Damien Hedde
2022-02-24  9:55       ` Igor Mammedov
2022-02-24 11:43         ` Damien Hedde
2022-02-25 11:38           ` Igor Mammedov
2022-02-25 15:31             ` Damien Hedde
2022-03-03 15:16               ` Philippe Mathieu-Daudé
2022-05-24 20:10   ` Jim Shu
2022-02-23  9:07 ` [PATCH v4 14/14] hw: set user_creatable on opentitan/sifive_e devices Damien Hedde
2022-03-04 12:58   ` Philippe Mathieu-Daudé
2022-05-24 20:10     ` Jim Shu
2022-03-03 10:58 ` [PATCH v4 00/14] Initial support for machine creation via QMP Damien Hedde
2022-05-24 19:54   ` Jim Shu

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