From: Tero Kaarlela <turo.kaarlela@co.inet.fi>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] OS/2 Bootloader Some weird behaviour of branch instruction
Date: Wed, 25 May 2005 21:13:11 +0300 [thread overview]
Message-ID: <4294C037.2070509@co.inet.fi> (raw)
Hi,
I took a look at qemu in_asm & cpu debugging with OS/2 bootloader
under Qemu -prep. And there is something weird happening in my opinion:
This happens after boot.cfg has been gone through and kernel bootstrap
task should start:
IN:
0xf0107068: .long 0x10009d81
0xf010706c: tdi 0,r0,27776
0xf0107070: bl F011EDF0 <<= Shouldnt this branch to F011EDF0
instead of going on???
0xf0107074: .long 0xb2c
0xf0107078: cmpwi r0,-32191
After this code branches back to 0x0f0107068(this block start) And does
this same block again 42 times. Then:
----------------
nip=00000300 super=1 ir=0
translate opcode f01072ac (3c 16 0a)
invalid/unsupported opcode: 3c - 16 - 0a (f01072ac) 0x00000300 0
IN:
0x00000300: lhau r3,4336(r18)
----------------
nip=00000700 super=1 ir=0
translate opcode f0000730 (3c 18 1c)
invalid/unsupported opcode: 3c - 18 - 1c (f0000730) 0x00000700 0
IN:
0x00000700: addic r0,r7,240
Here is CPU debug from same:
---------------- excp: 0108
nip=0xf0107068 LR=0xf0107010 CTR=0xf01071e0 XER=0x20000000 MSR=0x00010031
GPR00: f01072ac f0000060 00000000 f0170004 00000001 40000000 00000010
f0004100
GPR08: f0107010 84000023 f0107068 f01071e0 f0000000 f0000300 00000000
20000000
GPR16: 00000004 38603000 60000000 00000000 0000b588 00000000 001990c7
00195000
GPR24: 00000000 0000000c 00000041 40010031 00000010 00000000 f0000300
f0170004
CR: 0x84000023 [ L G - - - - E EO ] TB: 0x00000000 dd2f1962
FPR00: 6162636465666d00 0000000000000000 0000000000000000 0000000000000000
FPR04: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR08: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR12: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
SRR0 0xf0102700 SRR1 0x00010031 DECR=0x22d0b634
reservation 0x00000000
invalid/unsupported opcode: 3c - 16 - 0a (f01072ac) 0x00000300 0
---------------- excp: 0007
nip=0x00000300 LR=0xf0107010 CTR=0xf01071e0 XER=0x20000000 MSR=0x00010001
GPR00: f01072ac f0000060 00000000 f0170004 00000001 40000000 00000010
f0004100
GPR08: f0107010 84000023 f0107068 f01071e0 f0000000 f0000300 00000000
20000000
GPR16: 00000004 38603000 60000000 00000000 0000b588 00000000 001990c7
00195000
GPR24: 00000000 0000000c 00000041 40010031 00000010 00000000 f0000300
f0170004
CR: 0x84000023 [ L G - - - - E EO ] TB: 0x00000000 dd2fbe70
FPR00: 6162636465666d00 0000000000000000 0000000000000000 0000000000000000
FPR04: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR08: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR12: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
SRR0 0xf0107068 SRR1 0x00000031 DECR=0x22d014be
reservation 0x00000000
invalid/unsupported opcode: 3c - 18 - 1c (f0000730) 0x00000700 0
So any ideas what might be reason for this?
Tero Kaarlela
next reply other threads:[~2005-05-25 18:28 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-05-25 18:13 Tero Kaarlela [this message]
2005-05-25 18:59 ` [Qemu-devel] OS/2 Bootloader Some weird behaviour of branch instruction Tero Kaarlela
2005-05-25 20:57 ` J. Mayer
2005-05-29 14:02 ` Tero Kaarlela
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