From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1DxQlP-0001rp-1f for qemu-devel@nongnu.org; Tue, 26 Jul 2005 10:50:35 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1DxQlJ-0001qt-NT for qemu-devel@nongnu.org; Tue, 26 Jul 2005 10:50:31 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1DxQlF-0001Yg-79 for qemu-devel@nongnu.org; Tue, 26 Jul 2005 10:50:25 -0400 Received: from [62.2.95.247] (helo=smtp.hispeed.ch) by monty-python.gnu.org with esmtp (TLS-1.0:DHE_RSA_3DES_EDE_CBC_SHA:24) (Exim 4.34) id 1DxQmN-0000is-4n for qemu-devel@nongnu.org; Tue, 26 Jul 2005 10:51:35 -0400 Received: from [192.168.1.100] (80-218-108-238.dclient.hispeed.ch [80.218.108.238]) by smtp.hispeed.ch (8.12.6/8.12.6/tornado-1.0) with ESMTP id j6QEeOwg029649 (version=TLSv1/SSLv3 cipher=RC4-MD5 bits=128 verify=NO) for ; Tue, 26 Jul 2005 16:40:25 +0200 Message-ID: <42E64B9C.8080202@geodb.org> Date: Tue, 26 Jul 2005 16:41:32 +0200 From: Andreas Bollhalder MIME-Version: 1.0 Subject: Re: [Qemu-devel] Writing to ROM-Range 0xC800-EFFF References: <001201c58c8b$bb0c85b0$6401a8c0@geodb.org> <20050725153925.GA24463@jbrown.mylinuxbox.org> In-Reply-To: <20050725153925.GA24463@jbrown.mylinuxbox.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Hello Jim Thank you for the tips. I will have a look into it. Would be nice if QEMU could allow us to enable write access to the BIOS memory range (shadow RAM) which isn't in use. Andreas Jim C. Brown wrote: > On Tue, Jul 19, 2005 at 08:00:21PM +0200, Andreas Bollhalder wrote: > >>Hello >> >>What does I need to change in the source code of QEMU that it would be >>possible to enable write access to the ROM adresses from 0xC800 up to >>0xEFFF ? For instance, "UMBPCI.SYS" >>(http://www.uwe-sieber.de/umbpci_e.html) can made this range >>accessible for direct access if no BIOS-ROM is using it. The original >>chipset which QEMU emulate (Intel 440FX) does allow this, but in QEMU, >>it won't work. >> >>Any ideas ? >> >>Andreas >> > > > I'd recommend looking at i440fx_init() in hw/pci.c as a starting point. > > Also see if you can modify the constant IO_MEM_ROM. >