From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
kvm@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
Huacai Chen <chenhc@lemote.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH 9/9] target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ()
Date: Fri, 4 Dec 2020 11:04:21 -0600 [thread overview]
Message-ID: <42cae1ae-46aa-1207-dac7-1076b3422a7f@linaro.org> (raw)
In-Reply-To: <20201202184415.1434484-10-f4bug@amsat.org>
On 12/2/20 12:44 PM, Philippe Mathieu-Daudé wrote:
> +static bool gen_msa_BxZ(DisasContext *ctx, int df, int wt, int s16, bool if_not)
> +{
> + check_msa_access(ctx);
> +
> + if (ctx->hflags & MIPS_HFLAG_BMASK) {
> + generate_exception_end(ctx, EXCP_RI);
> + return true;
> + }
> +
> + gen_check_zero_element(bcond, df, wt);
> + if (if_not) {
> + tcg_gen_setcondi_tl(TCG_COND_EQ, bcond, bcond, 0);
> + }
Since gen_check_zero_element already produces a boolean, this is better as
tcg_gen_xori_tl(bcond, bcond, if_not);
where tcg_gen_xori_tl already contains the if.
> case OPC_BNZ_D:
> - gen_check_zero_element(bcond, df, wt);
> - tcg_gen_setcondi_tl(TCG_COND_EQ, bcond, bcond, 0);
> + gen_msa_BxZ(ctx, df, wt, s16, true);
... oops, that'd be for a follow-up patch, to make this patch just code movement.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2020-12-04 18:44 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-02 18:44 [PATCH 0/9] target/mips: Simplify MSA TCG logic Philippe Mathieu-Daudé
2020-12-02 18:44 ` [PATCH 1/9] target/mips: Introduce ase_msa_available() helper Philippe Mathieu-Daudé
2020-12-03 17:08 ` Richard Henderson
2020-12-02 18:44 ` [PATCH 2/9] target/mips: Simplify msa_reset() Philippe Mathieu-Daudé
2020-12-03 17:10 ` Richard Henderson
2020-12-02 18:44 ` [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA Philippe Mathieu-Daudé
2020-12-03 17:10 ` Richard Henderson
2020-12-02 18:44 ` [PATCH 4/9] target/mips: Simplify MSA TCG logic Philippe Mathieu-Daudé
2020-12-03 17:14 ` Richard Henderson
2020-12-02 18:44 ` [PATCH 5/9] target/mips: Remove now unused ASE_MSA definition Philippe Mathieu-Daudé
2020-12-03 17:15 ` Richard Henderson
2020-12-02 18:44 ` [PATCH 6/9] target/mips: Alias MSA vector registers on FPU scalar registers Philippe Mathieu-Daudé
2020-12-04 16:28 ` Richard Henderson
2020-12-04 22:40 ` Philippe Mathieu-Daudé
2020-12-05 12:44 ` Richard Henderson
2020-12-02 18:44 ` [PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init() Philippe Mathieu-Daudé
2020-12-04 16:30 ` Richard Henderson
2020-12-04 17:23 ` Philippe Mathieu-Daudé
2020-12-04 18:15 ` Richard Henderson
2020-12-02 18:44 ` [PATCH 8/9] target/mips: Remove CPUMIPSState* argument from gen_msa*() methods Philippe Mathieu-Daudé
2020-12-04 16:31 ` Richard Henderson
2020-12-02 18:44 ` [PATCH 9/9] target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ() Philippe Mathieu-Daudé
2020-12-04 17:04 ` Richard Henderson [this message]
2020-12-04 22:53 ` Philippe Mathieu-Daudé
2020-12-05 12:46 ` Richard Henderson
2020-12-03 3:36 ` [PATCH 0/9] target/mips: Simplify MSA TCG logic Jiaxun Yang
2020-12-03 3:38 ` Jiaxun Yang
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