From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1E6mhd-0006MB-VQ for qemu-devel@nongnu.org; Sun, 21 Aug 2005 06:05:22 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1E6mhX-0006Lg-Ua for qemu-devel@nongnu.org; Sun, 21 Aug 2005 06:05:17 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1E6mhS-0006Ky-IL for qemu-devel@nongnu.org; Sun, 21 Aug 2005 06:05:11 -0400 Received: from [84.96.92.56] (helo=smTp.neuf.fr) by monty-python.gnu.org with esmtp (Exim 4.34) id 1E6mda-00025g-Ar for qemu-devel@nongnu.org; Sun, 21 Aug 2005 06:01:10 -0400 Received: from [84.99.204.33] by sp604003mt.gpm.neuf.ld (Sun Java System Messaging Server 6.2-3.03 (built Jun 27 2005)) with ESMTP id <0ILK0078MH5C2S50@sp604003mt.gpm.neuf.ld> for qemu-devel@nongnu.org; Sun, 21 Aug 2005 12:00:48 +0200 (CEST) Date: Sun, 21 Aug 2005 12:01:34 +0200 From: Fabrice Bellard Subject: Re: [Qemu-devel] [patch] NPTL/TLS support In-reply-to: <200508141653.25261.paul@codesourcery.com> Message-id: <430850FE.9080306@bellard.org> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii; format=flowed Content-transfer-encoding: 7BIT References: <200508141653.25261.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Paul Brook wrote: > The attached patch adds partial support for ARM NPTL binaries. > > It implements the following things: > > - The Arm magic kernel code page. This is used on recent Arm kernels to > provide efficient access to kernel/CPU features. For example atomic > operations, and reading the TLS register (which may or may not be a real > hardware register). This is simplified version of the VDSO used on recent x86 > and ppc kernels. > - A new Arm specific syscall to set the TLS register. > - Support for the 5-argument form of sys_clone. > > This is sufficient to run single-threaded NPTL enabled binaries. I've not yet > implemented the futex syscalls, so multithreaded applications probaby won't > work. > > NPTL support is only enabled for ARM. Other architectures may need > architecture specific bits implementing before they can be enabled. On i386 there are AUXENTs to define the address of the VDSO page (AT_SYSINFO and AT_SYSINFO_EHDR). If it was supported by the ARM glibc, it would avoid some hacks you need to do to intercept calls to it. Can you check that ? Fabrice.