Re: [PATCH] target/arm: Return correct result for LDG when ATA=0

[Richard Henderson <richard.henderson@linaro.org>]

On 6/9/23 08:54, Peter Maydell wrote:
> The LDG instruction loads the tag from a memory address (identified
> by [Xn + offset]), and then merges that tag into the destination
> register Xt. We implemented this correctly for the case when
> allocation tags are enabled, but didn't get it right when ATA=0:
> instead of merging the tag bits into Xt, we merged them into the
> memory address [Xn + offset] and then set Xt to that.
> 
> Merge the tag bits into the old Xt value, as they should be.
> 
> Cc:qemu-stable@nongnu.org
> Fixes: c15294c1e36a7dd9b25 ("target/arm: Implement LDG, STG, ST2G instructions")
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
> Spotted this while I was doing decodetree conversion stuff.
> I guess nobody runs with MTE available but not turned on :-)

Indeed.  :-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~