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From: "Cédric Le Goater" <clg@kaod.org>
To: Fabiano Rosas <farosas@linux.ibm.com>, <qemu-devel@nongnu.org>
Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au
Subject: Re: [PATCH 2/3] target/ppc: Remove 603e exception model
Date: Thu, 9 Dec 2021 08:58:26 +0100	[thread overview]
Message-ID: <4330aa78-00a1-3de7-764d-dae2222654c9@kaod.org> (raw)
In-Reply-To: <20211208123029.2052625-3-farosas@linux.ibm.com>

On 12/8/21 13:30, Fabiano Rosas wrote:
> The 603e uses the same exception code as 603 so we don't need a
> dedicated entry for it.
> 
> This is only a removal of redundant code, no functional change.
> 
> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>

QEMU really only supports the 604. I think we could drop the
previous 60x CPUs also.

Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.


> ---
>   target/ppc/cpu-qom.h     |  2 --
>   target/ppc/cpu_init.c    | 32 ++------------------------------
>   target/ppc/excp_helper.c |  1 -
>   3 files changed, 2 insertions(+), 33 deletions(-)
> 
> diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
> index 5800fa324e..e585912571 100644
> --- a/target/ppc/cpu-qom.h
> +++ b/target/ppc/cpu-qom.h
> @@ -94,8 +94,6 @@ enum powerpc_excp_t {
>       POWERPC_EXCP_602,
>       /* PowerPC 603 exception model      */
>       POWERPC_EXCP_603,
> -    /* PowerPC 603e exception model     */
> -    POWERPC_EXCP_603E,
>       /* PowerPC G2 exception model       */
>       POWERPC_EXCP_G2,
>       /* PowerPC 604 exception model      */
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 55af48769a..8100b89033 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -4749,41 +4749,13 @@ POWERPC_FAMILY(603)(ObjectClass *oc, void *data)
>                    POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK;
>   }
>   
> -static void init_proc_603E(CPUPPCState *env)
> -{
> -    register_ne_601_sprs(env);
> -    register_sdr1_sprs(env);
> -    register_603_sprs(env);
> -    /* Time base */
> -    register_tbl(env);
> -    /* hardware implementation registers */
> -    /* XXX : not implemented */
> -    spr_register(env, SPR_HID0, "HID0",
> -                 SPR_NOACCESS, SPR_NOACCESS,
> -                 &spr_read_generic, &spr_write_generic,
> -                 0x00000000);
> -    /* XXX : not implemented */
> -    spr_register(env, SPR_HID1, "HID1",
> -                 SPR_NOACCESS, SPR_NOACCESS,
> -                 &spr_read_generic, &spr_write_generic,
> -                 0x00000000);
> -    /* Memory management */
> -    register_low_BATs(env);
> -    register_6xx_7xx_soft_tlb(env, 64, 2);
> -    init_excp_603(env);
> -    env->dcache_line_size = 32;
> -    env->icache_line_size = 32;
> -    /* Allocate hardware IRQ controller */
> -    ppc6xx_irq_init(env_archcpu(env));
> -}
> -
>   POWERPC_FAMILY(603E)(ObjectClass *oc, void *data)
>   {
>       DeviceClass *dc = DEVICE_CLASS(oc);
>       PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
>   
>       dc->desc = "PowerPC 603e";
> -    pcc->init_proc = init_proc_603E;
> +    pcc->init_proc = init_proc_603;
>       pcc->check_pow = check_pow_hid0;
>       pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB |
>                          PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
> @@ -4809,7 +4781,7 @@ POWERPC_FAMILY(603E)(ObjectClass *oc, void *data)
>                       (1ull << MSR_RI) |
>                       (1ull << MSR_LE);
>       pcc->mmu_model = POWERPC_MMU_SOFT_6xx;
> -    pcc->excp_model = POWERPC_EXCP_603E;
> +    pcc->excp_model = POWERPC_EXCP_603;
>       pcc->bus_model = PPC_FLAGS_INPUT_6xx;
>       pcc->bfd_mach = bfd_mach_ppc_ec603e;
>       pcc->flags = POWERPC_FLAG_TGPR | POWERPC_FLAG_SE |
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 17607adbe4..f15a859fe4 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -672,7 +672,6 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
>           switch (excp_model) {
>           case POWERPC_EXCP_602:
>           case POWERPC_EXCP_603:
> -        case POWERPC_EXCP_603E:
>           case POWERPC_EXCP_G2:
>               /* Swap temporary saved registers with GPRs */
>               if (!(new_msr & ((target_ulong)1 << MSR_TGPR))) {
> 



  reply	other threads:[~2021-12-09  8:01 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-08 12:30 [PATCH 0/3] target/ppc: Minor fixes to exception code Fabiano Rosas
2021-12-08 12:30 ` [PATCH 1/3] target/ppc: Fix MPCxxx FPU interrupt address Fabiano Rosas
2021-12-09  7:57   ` Cédric Le Goater
2021-12-15 16:47   ` Cédric Le Goater
2021-12-08 12:30 ` [PATCH 2/3] target/ppc: Remove 603e exception model Fabiano Rosas
2021-12-09  7:58   ` Cédric Le Goater [this message]
2021-12-08 12:30 ` [PATCH 3/3] target/ppc: Set 601v exception model id Fabiano Rosas
2021-12-09  7:58   ` Cédric Le Goater
2021-12-08 17:35 ` [PATCH 0/3] target/ppc: Minor fixes to exception code Richard Henderson
2021-12-15 16:44 ` Cédric Le Goater

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