From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1EedvW-0000HA-1Z for qemu-devel@nongnu.org; Tue, 22 Nov 2005 14:35:38 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1EedvT-0000CZ-Bu for qemu-devel@nongnu.org; Tue, 22 Nov 2005 14:35:37 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1EedvT-0000CC-2F for qemu-devel@nongnu.org; Tue, 22 Nov 2005 14:35:35 -0500 Received: from [84.96.92.60] (helo=Smtp.neuf.fr) by monty-python.gnu.org with esmtp (Exim 4.34) id 1EedvS-0007yc-ED for qemu-devel@nongnu.org; Tue, 22 Nov 2005 14:35:35 -0500 Received: from [84.102.211.71] by sp604001mt.gpm.neuf.ld (Sun Java System Messaging Server 6.2-4.03 (built Sep 22 2005)) with ESMTP id <0IQD009Q8F3UIT01@sp604001mt.gpm.neuf.ld> for qemu-devel@nongnu.org; Tue, 22 Nov 2005 20:21:30 +0100 (CET) Date: Tue, 22 Nov 2005 20:23:05 +0100 From: Fabrice Bellard Subject: Re: [Qemu-devel] SMP support In-reply-to: <1132673537.2569.10.camel@fred.ofc.soliddesign.net> Message-id: <43837019.5020408@bellard.org> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii; format=flowed Content-transfer-encoding: 7BIT References: <43825F9E.3050103@bellard.org> <1132673537.2569.10.camel@fred.ofc.soliddesign.net> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Joe Batt wrote: > This > > qemu -smp 2 -cdrom KNOPPIX_V3.8-2005-02-28-CeBIT_Edition-qemu-0.6.1-2.iso > > fails, but work fine without the -smp flag. The KNOPPIX has fairly > random seg faults. I had similar results with 4 virutal cpus. > > The host is a dual Xeon with hyperthreading turned on (so 4 total > "CPUs") running Debian testing, and a custom 2.6.13 kernel. The > compiler is gcc 3.3.5. > > You didn't offer up any description. Will this take advantage of host > SMP? How? (Each of us could read the code, or you could save the > collective a bunch of time...) I will add some documentation soon. To be short: QEMU is still single threaded which means that an SMP host does not increase the speed of an SMP target. Each target CPU uses slots of 1 ms on the host. Currently the performance is not optimal if "HLT" instructions are used on the target CPUs (i.e. if some target CPUs are idle) but it will be improved very soon. The QEMU accelerator is also not supported for SMP targets (although it should work fine on SMP hosts). For the future it could be possible to use host threads and to make the QEMU accelerator target SMP aware but it is not my priority. I think it is better to improve the correctness of the SMP target and to improve the speed of the single threaded QEMU accelerator. Fabrice.