[Qemu-devel] SMP support

[Qemu-devel] SMP support

[Fabrice Bellard]

Hi all,

I just commited the code to emulate SMP targets. As an example, I added 
support for x86 PCs with up to 8 CPUs (option -smp).

There are still some optimisations to do regarding the scheduling and I 
only tested the code with a Linux 2.4 guest OS.

Happy testing :-)

Fabrice.

Re: [Qemu-devel] SMP support

[Anthony Liguori]

Fabrice Bellard wrote:

> Hi all,
>
> I just commited the code to emulate SMP targets. As an example, I 
> added support for x86 PCs with up to 8 CPUs (option -smp).
>
> There are still some optimisations to do regarding the scheduling and 
> I only tested the code with a Linux 2.4 guest OS.

It appears to work with a 2.6 guest OS too.

Great stuff!

Regards,

Anthony Liguori

> Happy testing :-)
>
> Fabrice.
>
>
> _______________________________________________
> Qemu-devel mailing list
> Qemu-devel@nongnu.org
> http://lists.nongnu.org/mailman/listinfo/qemu-devel
>

Re: [Qemu-devel] SMP support

[Mulyadi Santosa]

Dear Fabrice...

> I just commited the code to emulate SMP targets. As an example, I
> added support for x86 PCs with up to 8 CPUs (option -smp).

Gooshhh, finally you made it....thanks a lot! I don't need 8 CPUs 
anyway, 2 is fine for me, but hey....surplus is always welcome :)

Testing is on the way ASAP........ If only gdbstub is mature enough too, 
this will make Qemu as my ideal OS debugging platform. So far, I rely 
on kdb/kgdb because gdbstub on qemu behaves incorrectly and I don't 
know how to fix it yet

regards

Mulyadi

Re: [Qemu-devel] SMP support

[Joe Batt]

This

	qemu -smp 2 -cdrom KNOPPIX_V3.8-2005-02-28-CeBIT_Edition-qemu-0.6.1-2.iso

fails, but work fine without the -smp flag.  The KNOPPIX has fairly
random seg faults.  I had similar results with 4 virutal cpus.

The host is a dual Xeon with hyperthreading turned on (so 4 total
"CPUs") running Debian testing, and a custom 2.6.13 kernel.  The
compiler is gcc 3.3.5.

You didn't offer up any description.  Will this take advantage of host
SMP?  How?  (Each of us could read the code, or you could save the
collective a bunch of time...)

Joe
 
On Tue, 2005-11-22 at 01:00 +0100, Fabrice Bellard wrote:
> Hi all,
> 
> I just commited the code to emulate SMP targets. As an example, I added 
> support for x86 PCs with up to 8 CPUs (option -smp).
> 
> There are still some optimisations to do regarding the scheduling and I 
> only tested the code with a Linux 2.4 guest OS.
> 
> Happy testing :-)
> 
> Fabrice.
> 
> 
> _______________________________________________
> Qemu-devel mailing list
> Qemu-devel@nongnu.org
> http://lists.nongnu.org/mailman/listinfo/qemu-devel
-- 
Joe Batt <Joe@soliddesign.net>

Re: [Qemu-devel] SMP support

[Fabrice Bellard]

Joe Batt wrote:
> This
> 
> 	qemu -smp 2 -cdrom KNOPPIX_V3.8-2005-02-28-CeBIT_Edition-qemu-0.6.1-2.iso
> 
> fails, but work fine without the -smp flag.  The KNOPPIX has fairly
> random seg faults.  I had similar results with 4 virutal cpus.
> 
> The host is a dual Xeon with hyperthreading turned on (so 4 total
> "CPUs") running Debian testing, and a custom 2.6.13 kernel.  The
> compiler is gcc 3.3.5.
> 
> You didn't offer up any description.  Will this take advantage of host
> SMP?  How?  (Each of us could read the code, or you could save the
> collective a bunch of time...)

I will add some documentation soon. To be short: QEMU is still single 
threaded which means that an SMP host does not increase the speed of an 
SMP target. Each target CPU uses slots of 1 ms on the host. Currently 
the performance is not optimal if "HLT" instructions are used on the 
target CPUs (i.e. if some target CPUs are idle) but it will be improved 
very soon. The QEMU accelerator is also not supported for SMP targets 
(although it should work fine on SMP hosts).

For the future it could be possible to use host threads and to make the 
QEMU accelerator target SMP aware but it is not my priority. I think it 
is better to improve the correctness of the SMP target and to improve 
the speed of the single threaded QEMU accelerator.

Fabrice.

[Qemu-devel] SMP support

[Julio Guerra]

I am testing Qemu's SMP support with a very simple program where every
cores execute an infinite loop incrementing a register. The goal is to
stop qemu and compare the register values on each core to evaluate the
simulation of SMP.

> qemu-system-ppc -M mpc8544ds -cpu e500mc -smp 4 -icount 4 -kernel test.elf

Here is a (lightened) log result for two cores from the above test :

> IN:
> 0x2f4:  addi    r1,r1,1
> 0x2f8:  addi    r1,r1,1
> 0x2fc:  ba       0x2f4
>
> TB 236 1014064768345
> GPR01 4d4a5d4
> PIR 1
> NIP 2f4
>
> TB 236 1014064768345
> GPR01 26bfd92
> PIR 2
> NIP 2f4

Having the same time base value, I was expecting to obtain the same R1 values.
Am I missing some options? I would like to be sure before starting
modifying qemu.

-- 
Julio Guerra