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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b663860sm17340281f8f.39.2025.04.02.07.25.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Apr 2025 07:25:36 -0700 (PDT) Message-ID: <43e170ad-d4e3-489d-a049-22361cd34f13@linaro.org> Date: Wed, 2 Apr 2025 16:25:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH-for-10.1 1/4] target/riscv: Restrict RV128 MTTCG check on system emulation To: Richard Henderson , qemu-devel@nongnu.org Cc: Anton Johansson , Pierrick Bouvier , Paolo Bonzini , qemu-riscv References: <20250321155925.96626-1-philmd@linaro.org> <20250321155925.96626-2-philmd@linaro.org> <2650b68f-e705-4994-9791-0bf8b2e01d74@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <2650b68f-e705-4994-9791-0bf8b2e01d74@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 23/3/25 19:08, Richard Henderson wrote: > On 3/21/25 08:59, Philippe Mathieu-Daudé wrote: >> Multi-threaded TCG only concerns system emulation. > > That's not really true.  User emulation simply has no option to > run in a single-threaded context. > > I really don't think we should allow RV128 in user-mode at all. > Certainly not until there's a kernel abi for it. It seems to be safe since commit 905b9fcde1f ("target/riscv: Replace is_32bit with get_xl/get_xlen"): #ifdef TARGET_RISCV32 #define get_xl(ctx) MXL_RV32 #elif defined(CONFIG_USER_ONLY) #define get_xl(ctx) MXL_RV64 #else #define get_xl(ctx) ((ctx)->xl) #endif Should we undefine MXL_RV128 on user-mode?