From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1FMVne-0001xX-8L for qemu-devel@nongnu.org; Thu, 23 Mar 2006 14:48:50 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1FMVnb-0001wj-0u for qemu-devel@nongnu.org; Thu, 23 Mar 2006 14:48:48 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1FMVna-0001wg-UR for qemu-devel@nongnu.org; Thu, 23 Mar 2006 14:48:46 -0500 Received: from [212.227.126.171] (helo=moutng.kundenserver.de) by monty-python.gnu.org with esmtp (Exim 4.52) id 1FMVoF-0000lL-7M for qemu-devel@nongnu.org; Thu, 23 Mar 2006 14:49:27 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) by flubber.weilnetz.de (Postfix) with ESMTP id 0A0B0F2C46 for ; Thu, 23 Mar 2006 20:48:25 +0100 (CET) Message-ID: <4422FB89.6000705@mail.berlios.de> Date: Thu, 23 Mar 2006 20:48:25 +0100 From: Stefan Weil MIME-Version: 1.0 Subject: [Qemu-devel] [PATCH] MIPS CP0 not usable in kernel mode? Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Hello, according to MIPS32 4KE User's Manual, coprocessor CP0 is always usable when the processor is running in kernel mode. So in kernel mode, exception "CP0 is not usable" should not happen. I think the boolean expression which checks for the exception condition has to be inverted - see my patch for translate.c. Kind regards, Stefan RCS file: /sources/qemu/qemu/target-mips/translate.c,v retrieving revision 1.11 diff -u -r1.11 translate.c --- target-mips/translate.c 5 Dec 2005 19:59:36 -0000 1.11 +++ target-mips/translate.c 23 Mar 2006 19:25:53 -0000 @@ -1180,7 +1180,7 @@ const unsigned char *opn = "unk"; if (!(ctx->CP0_Status & (1 << CP0St_CU0)) && - !(ctx->hflags & MIPS_HFLAG_UM) && + (ctx->hflags & MIPS_HFLAG_UM) && !(ctx->hflags & MIPS_HFLAG_ERL) && !(ctx->hflags & MIPS_HFLAG_EXL)) { if (loglevel & CPU_LOG_TB_IN_ASM) { //