From: Fabrice Bellard <fabrice@bellard.org>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] Emulation differences, qemu-system-x86_64 vs Athlon64
Date: Thu, 13 Apr 2006 00:18:05 +0200 [thread overview]
Message-ID: <443D7C9D.8010401@bellard.org> (raw)
In-Reply-To: <200604121308.00848.jseward@acm.org>
Julian Seward wrote:
> Recently I've been playing with CVS qemu-system (softmmu) on amd64
> and had some stability problems. I decided to run Valgrind's amd64
> instruction-set tests (derived from qemu's) to see if they picked up
> anything. Resulting diffs are attached.
>
> There are a bunch of differences for the C flag for rotates
> (rol/ror) by multiples of the word size. I don't think these
> are significant, but who knows.
This is a bug in QEMU. From the manuals, the C flag must be updated even
if the resulting shift is zero. I just modified the QEMU tests to catch
this problem (it is not x86_64 specific).
> Perhaps more worryingly are the 20 or so lines at the bottom
> of the diff. These I believe are for double-to-int/short
> conversions for a value which is out of range for an int/short;
> the hardware produces 0x80000000/0x8000 respectively, which is
> the "integer indefinite"; QEMU produces zero. I can imagine some
> obscure routine somewhere checking for integer indefinite after
> conversion and being confused as a result.
I guess the problem comes from the usage of lrintl() on x86_64 in
fpu/softfloat-native.c, but I cannot test it yet.
Fabrice.
next prev parent reply other threads:[~2006-04-12 22:19 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-04-12 12:08 [Qemu-devel] Emulation differences, qemu-system-x86_64 vs Athlon64 Julian Seward
2006-04-12 22:18 ` Fabrice Bellard [this message]
2006-04-12 23:15 ` Julian Seward
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