From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1FhYZs-00060e-4L for qemu-devel@nongnu.org; Sat, 20 May 2006 17:01:36 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1FhYZr-00060Q-0q for qemu-devel@nongnu.org; Sat, 20 May 2006 17:01:35 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1FhYZq-00060M-Ny for qemu-devel@nongnu.org; Sat, 20 May 2006 17:01:34 -0400 Received: from [147.11.1.11] (helo=mail.wrs.com) by monty-python.gnu.org with esmtp (Exim 4.52) id 1FhYdS-0003w6-L7 for qemu-devel@nongnu.org; Sat, 20 May 2006 17:05:18 -0400 Received: from ALA-MAIL03.corp.ad.wrs.com (ala-mail03 [147.11.57.144]) by mail.wrs.com (8.13.6/8.13.3) with ESMTP id k4KL1X5Q024289 for ; Sat, 20 May 2006 14:01:33 -0700 (PDT) Message-ID: <446F83AC.6050609@windriver.com> Date: Sat, 20 May 2006 16:01:32 -0500 From: Jason Wessel MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------010706030103030200080808" Subject: [Qemu-devel] [PATCH 3/5] ARM undefined instruction execution Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is a multi-part message in MIME format. --------------010706030103030200080808 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit This patch fixes the execution of undefined instructions for ARM. With out it the virtualized CPU incorrectly executes the do_abort vector instead. signed-off-by: jason.wessel@windriver.com Jason. --------------010706030103030200080808 Content-Type: text/plain; name="undefined_instruction_handler_fix.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="undefined_instruction_handler_fix.patch" Index: qemu/target-arm/translate.c =================================================================== --- qemu.orig/target-arm/translate.c +++ qemu/target-arm/translate.c @@ -1589,6 +1589,15 @@ static void disas_arm_insn(CPUState * en case 0x5: case 0x6: case 0x7: + /* Check for undefined extension instructions + * per the ARM Bible IE: + * xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx + */ + sh = (0xf << 20) | (0xf << 4); + if (op1 == 0x7 && ((insn & sh) == sh)) + { + goto illegal_op; + } /* load/store byte/word */ rn = (insn >> 16) & 0xf; rd = (insn >> 12) & 0xf; --------------010706030103030200080808--