From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Fut7G-0001RQ-Bj for qemu-devel@nongnu.org; Mon, 26 Jun 2006 11:35:10 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Fut7E-0001Q7-Lj for qemu-devel@nongnu.org; Mon, 26 Jun 2006 11:35:09 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Fut7E-0001Q4-En for qemu-devel@nongnu.org; Mon, 26 Jun 2006 11:35:08 -0400 Received: from [64.233.182.186] (helo=nf-out-0910.google.com) by monty-python.gnu.org with esmtp (Exim 4.52) id 1FutJ7-0006m0-SS for qemu-devel@nongnu.org; Mon, 26 Jun 2006 11:47:26 -0400 Received: by nf-out-0910.google.com with SMTP id c31so854000nfb for ; Mon, 26 Jun 2006 08:35:04 -0700 (PDT) Message-ID: <449FFEB2.1070305@gmail.com> Date: Mon, 26 Jun 2006 17:35:14 +0200 MIME-Version: 1.0 Subject: Re: [Qemu-devel] Pending MIPS patches References: <449EB5FA.6070405@gmail.com> <449EBC39.3050701@bellard.org> In-Reply-To: <449EBC39.3050701@bellard.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit From: Dirk Behme Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Fabrice Bellard wrote: >> 2. [PATCH][MIPS] add "lwu" instruction >> http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00326.html > > > On which MIPS CPU is it defined ? Need to track instruction sets exactly > to be able to select a given MIPS CPU at compile time or dynamically. > >> 3. [PATCH] Add special MIPS multiply instructions >> http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00375.html > > > Same remark. These are NEC VR54xx specific extensions to the MIPS instruction set. They are used if you use GCC's -march=vr5400 option. See www.necelam.com/docs/files/1375_V2.pdf as well. >> 9. [PATCH] Update MIPS status register with EXL and ERL bits at exception >> http://lists.gnu.org/archive/html/qemu-devel/2006-06/msg00329.html > > > OK but the following lines are suspicious: Yes, I see. I mixed two fixes, let me explain below: > - env->hflags = MIPS_HFLAG_ERL; > + env->hflags |= MIPS_HFLAG_ERL; This is a typo fix for a missing "or" (it should be "|=" instead of only "="). hflags is used as a shadow of the status register and there not the whole value should be set, only the corresponding flag. See for example correct usage of MIPS_HFLAG_EXL or MIPS_HFLAG_ERL in helper.c or op.c of target-mips. There, they are correctly used everywhere with "|=" or "&= ~", except at this place. > + env->CP0_Status &= (1 << CP0St_ERL); This is part of the "Update status register EXL and ERL flags directly, entering or leaving exception, not only hflags". So this two added lines fix the missing "or" and set the flag in the status register as well, not only in hflags. If you like you can apply the single "|=" line as a typo fix, and the rest as an additional fix to update status register as well with ERL and EXL. Regards Dirk Btw: Many thanks for commenting all patches!