From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1G3GLs-0001xo-69 for qemu-devel@nongnu.org; Wed, 19 Jul 2006 14:00:52 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1G3GLr-0001xb-GO for qemu-devel@nongnu.org; Wed, 19 Jul 2006 14:00:51 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1G3GLr-0001xY-B4 for qemu-devel@nongnu.org; Wed, 19 Jul 2006 14:00:51 -0400 Received: from [84.96.92.11] (helo=smtp.Neuf.fr) by monty-python.gnu.org with esmtp (Exim 4.52) id 1G3GLr-00008o-Rc for qemu-devel@nongnu.org; Wed, 19 Jul 2006 14:00:52 -0400 Received: from [84.102.211.155] by sp604005mt.gpm.neuf.ld (Sun Java System Messaging Server 6.2-5.05 (built Feb 16 2006)) with ESMTP id <0J2N0058DWD6Q522@sp604005mt.gpm.neuf.ld> for qemu-devel@nongnu.org; Wed, 19 Jul 2006 19:53:30 +0200 (CEST) Date: Wed, 19 Jul 2006 19:53:30 +0200 From: Fabrice Bellard Subject: Re: [Qemu-devel] smc91x irq patch In-reply-to: <200607190429.22717.paul@codesourcery.com> Message-id: <44BE719A.2000708@bellard.org> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii; format=flowed Content-transfer-encoding: 7BIT References: <44BCD9E8.6060108@nomovok.com> <44BD1450.6040002@gmx.net> <200607190429.22717.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Paul Brook wrote: > On Tuesday 18 July 2006 18:03, Thorsten Zitterell wrote: > >>I am working on a Gumstix system [1] emulation for QEMU which is based >>on a Intel XScale processor. The board has an expansion card for network >>support which is a smc91x compatible NIC. However, the irq line is not >>directly connected to the processor's interrupt controller but to an >>GPIO which triggers an irq when a level edge is detected. > > > As discussed on IRC this is the wrong way to do this. Instead use the > mechanisms in arm_pic.[ch] and make you GPIO emulation look like an interrupt > controller. > > There's no point passing round both a pic callback and an object when we can > embed the callback in the object. I don't think that adding a callback is bad. It can be useful to use the device with another CPU or IRQ controller for example. In fact, I would like to go further by adding a type such as "QEMUSignal" which could be used for IRQs or any other I/Os. Then you can pass it to devices. You can used qemu_signal_set(QEMUSignal *signal, int level) to set the level and add listeners to get notified on the changes with something like: qemu_add_signal_cb(QEMUSignal *signal, void (*cb)(void *opaque), void *opaque). Regards, Fabrice.