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From: Richard Henderson <richard.henderson@linaro.org>
To: Helge Deller <deller@gmx.de>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH v2 2/2] disas/hppa: Show hexcode of instruction along with disassembly
Date: Fri, 17 Nov 2023 11:52:32 -0800	[thread overview]
Message-ID: <44d4277a-3f43-47a4-9e5e-0c8bc49e7082@linaro.org> (raw)
In-Reply-To: <ZVej4L9FHe9zZF9A@p100>

On 11/17/23 09:33, Helge Deller wrote:
> * Richard Henderson <richard.henderson@linaro.org>:
>> On 11/17/23 02:53, deller@kernel.org wrote:
>>> From: Helge Deller <deller@gmx.de>
>>>
>>> On hppa many instructions can be expressed by different bytecodes.
>>> To be able to debug qemu translation bugs it's therefore necessary to see the
>>> currently executed byte codes without the need to lookup the sequence without
>>> the full executable.
>>> With this patch the instruction byte code is shown beside the disassembly.
>>>
>>> Signed-off-by: Helge Deller <deller@gmx.de>
>>> ---
>>>    disas/hppa.c | 3 +++
>>>    1 file changed, 3 insertions(+)
>>>
>>> diff --git a/disas/hppa.c b/disas/hppa.c
>>> index dcf9a47f34..38fc05acc4 100644
>>> --- a/disas/hppa.c
>>> +++ b/disas/hppa.c
>>> @@ -1979,6 +1979,9 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
>>>    	  if (opcode->arch == pa20w)
>>>    	    continue;
>>>    #endif
>>> +	  (*info->fprintf_func) (info->stream, " %02x %02x %02x %02x   ",
>>> +                (insn >> 24) & 0xff, (insn >> 16) & 0xff,
>>> +                (insn >>  8) & 0xff, insn & 0xff);
>>>    	  (*info->fprintf_func) (info->stream, "%s", opcode->name);
>>>    	  if (!strchr ("cfCY?-+nHNZFIuv{", opcode->args[0]))
>>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>>
>> A possible improvement is to push this outside of the search loop and then change
>>
>>       }
>> -  (*info->fprintf_func) (info->stream, "#%8x", insn);
>> +  info->fprintf_func(info->stream, "<unknown>");
>>     return sizeof (insn);
>>
>> so the byte decode is shared with the rare case of garbage in the insn stream.
> 
> Like below?

Yes, perfect, thanks.


r~

> 
> From: Helge Deller <deller@gmx.de>
> Subject: [PATCH] disas/hppa: Show hexcode of instruction along with
>   disassembly
> 
> On hppa many instructions can be expressed by different bytecodes.
> To be able to debug qemu translation bugs it's therefore necessary to see the
> currently executed byte codes without the need to lookup the sequence without
> the full executable.
> With this patch the instruction byte code is shown beside the disassembly.
> 
> Signed-off-by: Helge Deller <deller@gmx.de>
> 
> diff --git a/disas/hppa.c b/disas/hppa.c
> index dcf9a47f34..cce4f4aa37 100644
> --- a/disas/hppa.c
> +++ b/disas/hppa.c
> @@ -1968,6 +1968,10 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
>   
>     insn = bfd_getb32 (buffer);
>   
> +  info->fprintf_func(info->stream, " %02x %02x %02x %02x   ",
> +                (insn >> 24) & 0xff, (insn >> 16) & 0xff,
> +                (insn >>  8) & 0xff, insn & 0xff);
> +
>     for (i = 0; i < NUMOPCODES; ++i)
>       {
>         const struct pa_opcode *opcode = &pa_opcodes[i];
> @@ -2826,6 +2830,6 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
>   	  return sizeof (insn);
>   	}
>       }
> -  (*info->fprintf_func) (info->stream, "#%8x", insn);
> +  info->fprintf_func(info->stream, "<unknown>");
>     return sizeof (insn);
>   }



      reply	other threads:[~2023-11-17 19:53 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-17 10:53 [PATCH v2 0/2] HPPA64-PATCHES-for-8.2 deller
2023-11-17 10:53 ` [PATCH v2 1/2] target/hppa: Fix 64-bit SHRPD instruction deller
2023-11-17 16:42   ` Richard Henderson
2023-11-17 10:53 ` [PATCH v2 2/2] disas/hppa: Show hexcode of instruction along with disassembly deller
2023-11-17 16:45   ` Richard Henderson
2023-11-17 17:33     ` Helge Deller
2023-11-17 19:52       ` Richard Henderson [this message]

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