* [PATCH v3] aplic: fix mask for smsiaddrcfgh
@ 2025-10-11 0:54 Jialong Yang
0 siblings, 0 replies; 2+ messages in thread
From: Jialong Yang @ 2025-10-11 0:54 UTC (permalink / raw)
To: Palmer Dabbelt, Alistair Francis, Weiwei Li,
Daniel Henrique Barboza, Liu Zhiwei
Cc: jialong.yang, Jialong Yang, qemu-riscv, qemu-devel
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4.5.4. Supervisor MSI address configuration (smsiaddrcfg and
smsiaddrcfgh)
smsiaddrcfgh:
bits 22:20 LHXS(WARL)
bits 11:0 High Base PPN(WARL)
Signed-off-by: Jialong Yang <z_bajeer@yeah.net>
---
hw/intc/riscv_aplic.c | 29 ++++++++++++++++++-----------
1 file changed, 18 insertions(+), 11 deletions(-)
v1 --> v2:
- fix calculation of MSI address.
- In Supervisor mode, lhxw/hhxs/hhxw fields are in mmsiaddrcfgh register.
- And lhxs field is in smsiaddrcfgh.
v2 --> v3:
- Fix compile error when enable kvm.
diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index a1d9fa5085..6dccca73af 100644
--- a/hw/intc/riscv_aplic.c
+++ b/hw/intc/riscv_aplic.c
@@ -96,7 +96,7 @@
(APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) << \
APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs))
-#define APLIC_xMSICFGADDRH_VALID_MASK \
+#define APLIC_MMSICFGADDRH_VALID_MASK \
(APLIC_xMSICFGADDRH_L | \
(APLIC_xMSICFGADDRH_HHXS_MASK << APLIC_xMSICFGADDRH_HHXS_SHIFT) | \
(APLIC_xMSICFGADDRH_LHXS_MASK << APLIC_xMSICFGADDRH_LHXS_SHIFT) | \
@@ -104,6 +104,10 @@
(APLIC_xMSICFGADDRH_LHXW_MASK << APLIC_xMSICFGADDRH_LHXW_SHIFT) | \
APLIC_xMSICFGADDRH_BAPPN_MASK)
+#define APLIC_SMSICFGADDRH_VALID_MASK \
+ ((APLIC_xMSICFGADDRH_LHXS_MASK << APLIC_xMSICFGADDRH_LHXS_SHIFT) | \
+ APLIC_xMSICFGADDRH_BAPPN_MASK)
+
#define APLIC_SETIP_BASE 0x1c00
#define APLIC_SETIPNUM 0x1cdc
@@ -184,7 +188,7 @@ void riscv_aplic_set_kvm_msicfgaddr(RISCVAPLICState *aplic, hwaddr addr)
addr >>= APLIC_xMSICFGADDR_PPN_SHIFT;
aplic->kvm_msicfgaddr = extract64(addr, 0, 32);
aplic->kvm_msicfgaddrH = extract64(addr, 32, 32) &
- APLIC_xMSICFGADDRH_VALID_MASK;
+ APLIC_MMSICFGADDRH_VALID_MASK;
}
#endif
}
@@ -409,13 +413,8 @@ static void riscv_aplic_msi_send(RISCVAPLICState *aplic,
msicfgaddr = aplic->kvm_msicfgaddr;
msicfgaddrH = ((uint64_t)aplic->kvm_msicfgaddrH << 32);
} else {
- if (aplic->mmode) {
- msicfgaddr = aplic_m->mmsicfgaddr;
- msicfgaddrH = aplic_m->mmsicfgaddrH;
- } else {
- msicfgaddr = aplic_m->smsicfgaddr;
- msicfgaddrH = aplic_m->smsicfgaddrH;
- }
+ msicfgaddr = aplic_m->mmsicfgaddr;
+ msicfgaddrH = aplic_m->mmsicfgaddrH;
}
lhxs = (msicfgaddrH >> APLIC_xMSICFGADDRH_LHXS_SHIFT) &
@@ -427,6 +426,14 @@ static void riscv_aplic_msi_send(RISCVAPLICState *aplic,
hhxw = (msicfgaddrH >> APLIC_xMSICFGADDRH_HHXW_SHIFT) &
APLIC_xMSICFGADDRH_HHXW_MASK;
+ if (!aplic->kvm_splitmode && !aplic->mmode) {
+ msicfgaddrH = aplic_m->smsicfgaddrH;
+ msicfgaddr = aplic_m->smsicfgaddr;
+
+ lhxs = (msicfgaddrH >> APLIC_xMSICFGADDRH_LHXS_SHIFT) &
+ APLIC_xMSICFGADDRH_LHXS_MASK;
+ }
+
group_idx = hart_idx >> lhxw;
addr = msicfgaddr;
@@ -771,7 +778,7 @@ static void riscv_aplic_write(void *opaque, hwaddr addr, uint64_t value,
} else if (aplic->mmode && aplic->msimode &&
(addr == APLIC_MMSICFGADDRH)) {
if (!(aplic->mmsicfgaddrH & APLIC_xMSICFGADDRH_L)) {
- aplic->mmsicfgaddrH = value & APLIC_xMSICFGADDRH_VALID_MASK;
+ aplic->mmsicfgaddrH = value & APLIC_MMSICFGADDRH_VALID_MASK;
}
} else if (aplic->mmode && aplic->msimode &&
(addr == APLIC_SMSICFGADDR)) {
@@ -792,7 +799,7 @@ static void riscv_aplic_write(void *opaque, hwaddr addr, uint64_t value,
(addr == APLIC_SMSICFGADDRH)) {
if (aplic->num_children &&
!(aplic->mmsicfgaddrH & APLIC_xMSICFGADDRH_L)) {
- aplic->smsicfgaddrH = value & APLIC_xMSICFGADDRH_VALID_MASK;
+ aplic->smsicfgaddrH = value & APLIC_SMSICFGADDRH_VALID_MASK;
}
} else if ((APLIC_SETIP_BASE <= addr) &&
(addr < (APLIC_SETIP_BASE + aplic->bitfield_words * 4))) {
--
2.43.0
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^ permalink raw reply related [flat|nested] 2+ messages in thread* [PATCH v3] aplic: fix mask for smsiaddrcfgh
@ 2025-10-10 14:56 Jialong Yang
0 siblings, 0 replies; 2+ messages in thread
From: Jialong Yang @ 2025-10-10 14:56 UTC (permalink / raw)
To: Palmer Dabbelt, Alistair Francis, Weiwei Li,
Daniel Henrique Barboza, Liu Zhiwei
Cc: jialong.yang, Jialong Yang, qemu-riscv, qemu-devel
Signed-off-by: Jialong Yang <z_bajeer@yeah.net>
---
hw/intc/riscv_aplic.c | 29 ++++++++++++++++++-----------
1 file changed, 18 insertions(+), 11 deletions(-)
v1 --> v2:
- fix calculation of MSI address.
- In Supervisor mode, lhxw/hhxs/hhxw fields are in mmsiaddrcfgh register.
- And lhxs field is in smsiaddrcfgh.
v2 --> v3:
- Fix compile error when enable kvm.
diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index a1d9fa5085..6dccca73af 100644
--- a/hw/intc/riscv_aplic.c
+++ b/hw/intc/riscv_aplic.c
@@ -96,7 +96,7 @@
(APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) << \
APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs))
-#define APLIC_xMSICFGADDRH_VALID_MASK \
+#define APLIC_MMSICFGADDRH_VALID_MASK \
(APLIC_xMSICFGADDRH_L | \
(APLIC_xMSICFGADDRH_HHXS_MASK << APLIC_xMSICFGADDRH_HHXS_SHIFT) | \
(APLIC_xMSICFGADDRH_LHXS_MASK << APLIC_xMSICFGADDRH_LHXS_SHIFT) | \
@@ -104,6 +104,10 @@
(APLIC_xMSICFGADDRH_LHXW_MASK << APLIC_xMSICFGADDRH_LHXW_SHIFT) | \
APLIC_xMSICFGADDRH_BAPPN_MASK)
+#define APLIC_SMSICFGADDRH_VALID_MASK \
+ ((APLIC_xMSICFGADDRH_LHXS_MASK << APLIC_xMSICFGADDRH_LHXS_SHIFT) | \
+ APLIC_xMSICFGADDRH_BAPPN_MASK)
+
#define APLIC_SETIP_BASE 0x1c00
#define APLIC_SETIPNUM 0x1cdc
@@ -184,7 +188,7 @@ void riscv_aplic_set_kvm_msicfgaddr(RISCVAPLICState *aplic, hwaddr addr)
addr >>= APLIC_xMSICFGADDR_PPN_SHIFT;
aplic->kvm_msicfgaddr = extract64(addr, 0, 32);
aplic->kvm_msicfgaddrH = extract64(addr, 32, 32) &
- APLIC_xMSICFGADDRH_VALID_MASK;
+ APLIC_MMSICFGADDRH_VALID_MASK;
}
#endif
}
@@ -409,13 +413,8 @@ static void riscv_aplic_msi_send(RISCVAPLICState *aplic,
msicfgaddr = aplic->kvm_msicfgaddr;
msicfgaddrH = ((uint64_t)aplic->kvm_msicfgaddrH << 32);
} else {
- if (aplic->mmode) {
- msicfgaddr = aplic_m->mmsicfgaddr;
- msicfgaddrH = aplic_m->mmsicfgaddrH;
- } else {
- msicfgaddr = aplic_m->smsicfgaddr;
- msicfgaddrH = aplic_m->smsicfgaddrH;
- }
+ msicfgaddr = aplic_m->mmsicfgaddr;
+ msicfgaddrH = aplic_m->mmsicfgaddrH;
}
lhxs = (msicfgaddrH >> APLIC_xMSICFGADDRH_LHXS_SHIFT) &
@@ -427,6 +426,14 @@ static void riscv_aplic_msi_send(RISCVAPLICState *aplic,
hhxw = (msicfgaddrH >> APLIC_xMSICFGADDRH_HHXW_SHIFT) &
APLIC_xMSICFGADDRH_HHXW_MASK;
+ if (!aplic->kvm_splitmode && !aplic->mmode) {
+ msicfgaddrH = aplic_m->smsicfgaddrH;
+ msicfgaddr = aplic_m->smsicfgaddr;
+
+ lhxs = (msicfgaddrH >> APLIC_xMSICFGADDRH_LHXS_SHIFT) &
+ APLIC_xMSICFGADDRH_LHXS_MASK;
+ }
+
group_idx = hart_idx >> lhxw;
addr = msicfgaddr;
@@ -771,7 +778,7 @@ static void riscv_aplic_write(void *opaque, hwaddr addr, uint64_t value,
} else if (aplic->mmode && aplic->msimode &&
(addr == APLIC_MMSICFGADDRH)) {
if (!(aplic->mmsicfgaddrH & APLIC_xMSICFGADDRH_L)) {
- aplic->mmsicfgaddrH = value & APLIC_xMSICFGADDRH_VALID_MASK;
+ aplic->mmsicfgaddrH = value & APLIC_MMSICFGADDRH_VALID_MASK;
}
} else if (aplic->mmode && aplic->msimode &&
(addr == APLIC_SMSICFGADDR)) {
@@ -792,7 +799,7 @@ static void riscv_aplic_write(void *opaque, hwaddr addr, uint64_t value,
(addr == APLIC_SMSICFGADDRH)) {
if (aplic->num_children &&
!(aplic->mmsicfgaddrH & APLIC_xMSICFGADDRH_L)) {
- aplic->smsicfgaddrH = value & APLIC_xMSICFGADDRH_VALID_MASK;
+ aplic->smsicfgaddrH = value & APLIC_SMSICFGADDRH_VALID_MASK;
}
} else if ((APLIC_SETIP_BASE <= addr) &&
(addr < (APLIC_SETIP_BASE + aplic->bitfield_words * 4))) {
--
2.43.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
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