From: Markus Schiltknecht <markus@bluegap.ch>
To: laurent.desnogues@wanadoo.fr
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] ARM CPU Speed simulated by Qemu?
Date: Tue, 12 Sep 2006 17:19:21 +0200 [thread overview]
Message-ID: <4506CFF9.4010305@bluegap.ch> (raw)
In-Reply-To: <33074299.1158073713450.JavaMail.www@wwinf1515>
Laurent DESNOGUES wrote:
> On top of that try to find a specification for data
> side behaviour, these beasts are not documented for
> two reasons:
> - they are heavily optimized and so not easily
> described
> - they often define the efficiency of a CPU and
> so are considered as secret.
That might be the hardest part. Simulating any level of caches should
not be _that_ hard. (And a write or store buffer looks just exactly like
yet another cache).
>> Simulating branch prediction seems more complex to me (probably because
>> I'm thinking x86, not ARM).
>
> Branch prediction has become very complex on ARM
> but not as much as data side.
Sorry, I meant to refer to the pipeline, which is significantly shorter
on ARM than on the NetBurst CPUs from Intel... :-)
Thank you for your help.
Markus
next prev parent reply other threads:[~2006-09-12 15:19 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-09-12 15:08 [Qemu-devel] ARM CPU Speed simulated by Qemu? Laurent DESNOGUES
2006-09-12 15:19 ` Markus Schiltknecht [this message]
-- strict thread matches above, loose matches on Subject: below --
2006-09-12 15:26 Laurent DESNOGUES
2006-09-12 14:44 Laurent DESNOGUES
2006-09-12 14:58 ` Markus Schiltknecht
2006-09-12 17:42 ` K. Richard Pixley
2006-09-12 0:17 [Qemu-devel] Re: qemu-system-sparc video problem on 16 bitdisplays Stuart Brady
2006-09-12 7:20 ` [Qemu-devel] ARM CPU Speed simulated by Qemu? Tieu Ma Dau
2006-09-12 11:03 ` nyos
2006-09-12 12:43 ` Paul Brook
2006-09-12 13:19 ` Markus Schiltknecht
2006-09-12 13:39 ` Paul Brook
2006-09-12 14:21 ` Markus Schiltknecht
2006-09-12 14:34 ` Paul Brook
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