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Date: Fri, 29 Sep 2006 10:43:48 +0200
From: Tom Marn <tom.marn@telargo.com>
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Subject: [Qemu-devel] ppc "stfiwx" floating point missing implementation
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To: qemu-devel@nongnu.org

Hi

I'm using QEMU to emulate PowerPC 603e for testing my cross compiled root filesystem on i686. 
When executing binary which is compiled (without -msoft-float) to use full floating point instruction set,
kernel returns "Illegal instruction" at runtime. After core dump debugging my binary I found out,
that optional "stfiwx" instruction is not implemented. I'm trying to implement this instruction, 
instead of returning RET_INVAL(ctx), I'm using code from "stfdx" function as an example which is similar to "stfiwx".
Now when "stfiwx" is executed it works but the code become unstable. 
Because leak of knowledge about qemu pseudo instructions, I guess that the problem is how to properly load "integer word"
to the specified memory location. I think that op_ldst(stfs) is not proper replacement or something else is still missing.

Could someone please to help implement the missing "stfiwx" instruction.  (hints are also appreciated) ;)

Tom

Here is my modified translate.c (still broken code)


--- target-ppc/translate.c.orig 2006-09-29 09:29:28.000000000 +0200
+++ target-ppc/translate.c  2006-09-29 09:39:17.000000000 +0200
@@ -1715,21 +1715,30 @@
 GEN_STFS(fs, 0x14);

 /* Optional: */
 /* stfiwx */
 GEN_HANDLER(stfiwx, 0x1F, 0x17, 0x1E, 0x00000001, PPC_FLOAT)
 {
     if (!ctx->fpu_enabled) {
         RET_EXCP(ctx, EXCP_NO_FP, 0);
         return;
     }
-    RET_INVAL(ctx);
+
+    if (rA(ctx->opcode) == 0) {                                               
+        gen_op_load_gpr_T0(rB(ctx->opcode));                                  
+    } else {                                                                  
+        gen_op_load_gpr_T0(rA(ctx->opcode));                                  
+        gen_op_load_gpr_T1(rB(ctx->opcode));                                  
+        gen_op_add();                                                         
+    }                                                                         
+    gen_op_load_fpr_FT1(rS(ctx->opcode));                                     
+    op_ldst(stfs);
 }

 /***                                Branch                                 ***/

 static inline void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
 {
     TranslationBlock *tb;
     tb = ctx->tb;
     if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK)) {
         if (n == 0)