From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1GXZ6H-0001E6-U6 for qemu-devel@nongnu.org; Wed, 11 Oct 2006 04:06:01 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1GXZ6G-0001Cr-0q for qemu-devel@nongnu.org; Wed, 11 Oct 2006 04:06:01 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1GXZ6F-0001Co-Pa for qemu-devel@nongnu.org; Wed, 11 Oct 2006 04:05:59 -0400 Received: from [129.41.63.60] (helo=out002.atlarge.net) by monty-python.gnu.org with esmtp (Exim 4.52) id 1GXZED-0005dN-2H for qemu-devel@nongnu.org; Wed, 11 Oct 2006 04:14:13 -0400 Message-ID: <452CA5E3.5040909@telargo.com> Date: Wed, 11 Oct 2006 10:05:55 +0200 From: Tom Marn MIME-Version: 1.0 Subject: Re: [Qemu-devel] PATCH stfiwx implementation References: <452B639A.3090304@telargo.com> In-Reply-To: <452B639A.3090304@telargo.com> Content-Type: multipart/mixed; boundary="------------070501030206030104050705" Reply-To: tom.marn@telargo.com, qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: tom.marn@telargo.com, qemu-devel@nongnu.org This is a multi-part message in MIME format. --------------070501030206030104050705 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Hi Resending fixed patch, mirror fix in glue(stfi, MEMSUFFIX) function; bitwise typo: && instead of &. Tom Marn --------------070501030206030104050705 Content-Type: text/x-patch; name="stfiwx_cast.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="stfiwx_cast.patch" Patch which appends optional "stfiwx" PowerPC instruction into QEMU. Mirror fix of patch: 2006-10-11 : bitwise typo && instead & Tom Marn --- target-ppc/translate.c.orig 2006-10-11 09:05:17.000000000 +0200 +++ target-ppc/translate.c 2006-10-11 09:56:02.000000000 +0200 @@ -1716,14 +1716,29 @@ GEN_STFS(fs, 0x14); /* Optional: */ /* stfiwx */ -GEN_HANDLER(stfiwx, 0x1F, 0x17, 0x1E, 0x00000001, PPC_FLOAT) -{ - if (!ctx->fpu_enabled) { - RET_EXCP(ctx, EXCP_NO_FP, 0); - return; - } - RET_INVAL(ctx); -} +#define GEN_STWXF(width) \ +GEN_HANDLER(st##width##wx, 0x1F, 0x17, 0x1E, 0x00000001, PPC_FLOAT) \ +{ \ + if (!ctx->fpu_enabled) { \ + RET_EXCP(ctx, EXCP_NO_FP, 0); \ + return; \ + } \ + if (rA(ctx->opcode) == 0) { \ + gen_op_load_gpr_T0(rB(ctx->opcode)); \ + } else { \ + gen_op_load_gpr_T0(rA(ctx->opcode)); \ + gen_op_load_gpr_T1(rB(ctx->opcode)); \ + gen_op_add(); \ + } \ + gen_op_load_fpr_FT1(rS(ctx->opcode)); \ + op_ldst(st##width); \ +} + +#define GEN_STFI(width) \ +OP_ST_TABLE(width); \ +GEN_STWXF(width); + +GEN_STFI(fi); /*** Branch ***/ --- target-ppc/op_mem.h.orig 2006-10-11 09:05:28.000000000 +0200 +++ target-ppc/op_mem.h 2006-10-11 09:52:28.000000000 +0200 @@ -187,6 +187,30 @@ PPC_OP(glue(glue(st, name), MEMSUFFIX)) PPC_STF_OP(fd, stfq); PPC_STF_OP(fs, stfl); + +static inline void glue(stfi, MEMSUFFIX) (target_ulong EA, float f) +{ + union { + float f; + uint32_t u; + } u; + + u.f = f; + u.u = u.u & 0x00000000FFFFFFFFULL; + glue(stl, MEMSUFFIX)(T0, u.f); + RETURN(); +} + +#if 0 +static inline void glue(stfi, MEMSUFFIX) (target_ulong EA, float f) +{ + glue(stl, MEMSUFFIX)(T0,(int)f); + RETURN(); +} +#endif + +PPC_STF_OP(fi, stfi); + static inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, double d) { union { @@ -224,6 +248,23 @@ static inline void glue(stflr, MEMSUFFIX PPC_STF_OP(fd_le, stfqr); PPC_STF_OP(fs_le, stflr); +static inline void glue(stfir, MEMSUFFIX) (target_ulong EA, float f) +{ + union { + float f; + uint32_t u; + } u; + + u.f = f; + u.u = ((u.u & 0xFF000000UL) >> 24) | + ((u.u & 0x00FF0000ULL) >> 8) | + ((u.u & 0x0000FF00UL) << 8) | + ((u.u & 0x000000FFULL) << 24); + glue(stfi, MEMSUFFIX)(EA, u.f); +} + +PPC_STF_OP(fi_le, stfir); + /*** Floating-point load ***/ #define PPC_LDF_OP(name, op) \ PPC_OP(glue(glue(l, name), MEMSUFFIX)) \ --------------070501030206030104050705--