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From: Jiajie Chen <c@jia.je>
To: WANG Xuerui <i.qemu@xen0n.name>, qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org, yijun@loongson.cn,
	shenjinyang@loongson.cn,
	 Xiaojuan Yang <yangxiaojuan@loongson.cn>,
	Song Gao <gaosong@loongson.cn>
Subject: Re: [PATCH v3 2/6] target/loongarch: Add loongarch32 cpu la132
Date: Mon, 7 Aug 2023 17:55:54 +0800	[thread overview]
Message-ID: <454fd6c8-bd01-97f7-b171-bb85fbf63adb@jia.je> (raw)
In-Reply-To: <c9f44271-0f17-037d-9e8b-d598a78a5e27@xen0n.name>


On 2023/8/7 17:54, WANG Xuerui wrote:
> Hi,
>
> On 2023/8/7 17:45, Jiajie Chen wrote:
>> Add la132 as a loongarch32 cpu type and allow virt machine to be used
>> with la132 instead of la464.
>>
>> Signed-off-by: Jiajie Chen <c@jia.je>
>> ---
>>   hw/loongarch/virt.c    |  5 -----
>>   target/loongarch/cpu.c | 41 +++++++++++++++++++++++++++++++++++++++++
>>   target/loongarch/cpu.h | 11 +++++++++++
>>   3 files changed, 52 insertions(+), 5 deletions(-)
>>
>> diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
>> index e19b042ce8..af15bf5aaa 100644
>> --- a/hw/loongarch/virt.c
>> +++ b/hw/loongarch/virt.c
>> @@ -798,11 +798,6 @@ static void loongarch_init(MachineState *machine)
>>           cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
>>       }
>>   -    if (!strstr(cpu_model, "la464")) {
>> -        error_report("LoongArch/TCG needs cpu type la464");
>> -        exit(1);
>> -    }
>> -
>>       if (ram_size < 1 * GiB) {
>>           error_report("ram_size must be greater than 1G.");
>>           exit(1);
>> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
>> index ad93ecac92..d31efe86da 100644
>> --- a/target/loongarch/cpu.c
>> +++ b/target/loongarch/cpu.c
>> @@ -362,6 +362,8 @@ static void loongarch_la464_initfn(Object *obj)
>>       CPULoongArchState *env = &cpu->env;
>>       int i;
>>   +    env->mode = LA64;
>> +
>>       for (i = 0; i < 21; i++) {
>>           env->cpucfg[i] = 0x0;
>>       }
>> @@ -439,6 +441,20 @@ static void loongarch_la464_initfn(Object *obj)
>>       env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);
>>   }
>>   +static void loongarch_la132_initfn(Object *obj)
>> +{
>> +    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
>> +    CPULoongArchState *env = &cpu->env;
>> +
>> +    env->mode = LA32;
>> +
>> +    cpu->dtb_compatible = "loongarch,Loongson-3C103";
>
> "3C103"? I assume you want something like "1C300" or "1Axxx", at least 
> something prefixed with "1"...

You are right, I was meant to write "1C103"..



  reply	other threads:[~2023-08-07  9:56 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-07  9:44 [PATCH v3 0/6] Add loongarch32 mode for loongarch64-softmmu Jiajie Chen
2023-08-07  9:45 ` [PATCH v3 1/6] target/loongarch: " Jiajie Chen
2023-08-07 15:13   ` Richard Henderson
2023-08-07 15:14     ` Jiajie Chen
2023-08-07  9:45 ` [PATCH v3 2/6] target/loongarch: Add loongarch32 cpu la132 Jiajie Chen
2023-08-07  9:54   ` WANG Xuerui
2023-08-07  9:55     ` Jiajie Chen [this message]
2023-08-07 15:17   ` Richard Henderson
2023-08-07  9:45 ` [PATCH v3 3/6] target/loongarch: Add GDB support for loongarch32 mode Jiajie Chen
2023-08-07 15:19   ` Richard Henderson
2023-08-07  9:45 ` [PATCH v3 4/6] target/loongarch: Support LoongArch32 TLB entry Jiajie Chen
2023-08-07 15:41   ` Richard Henderson
2023-08-07  9:45 ` [PATCH v3 5/6] target/loongarch: Support LoongArch32 DMW Jiajie Chen
2023-08-07 15:50   ` Richard Henderson
2023-08-07 17:32     ` Jiajie Chen
2023-08-07 19:34       ` Richard Henderson
2023-08-07  9:45 ` [PATCH v3 6/6] target/loongarch: Support LoongArch32 VPPN Jiajie Chen
2023-08-07  9:48   ` Jiajie Chen
2023-08-07 11:53   ` gaosong
2023-08-07 11:56     ` Jiajie Chen
2023-08-07 15:40 ` [PATCH v3 0/6] Add loongarch32 mode for loongarch64-softmmu Richard Henderson
2023-08-07 15:43   ` Jiajie Chen
2023-08-07 15:56     ` Richard Henderson
2023-08-07 15:58       ` Jiajie Chen

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