[Qemu-devel] [PATCH 3/6] A cumulative MIPS patchset

[Qemu-devel] [PATCH 3/6] A cumulative MIPS patchset

[Thiemo Seufer]

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Hello All,

this patch adds more devices to the MIPS system emulation, most
importantly a RTC emulation which e.g. keeps timestamps on a
linux filesystem sane.


Thiemo


Index: qemu-work/Makefile.target
===================================================================
--- qemu-work.orig/Makefile.target	2006-11-20 01:18:46.000000000 +0000
+++ qemu-work/Makefile.target	2006-11-20 01:21:22.000000000 +0000
@@ -358,7 +358,8 @@
 endif
 ifeq ($(TARGET_ARCH), mips)
 VL_OBJS+= mips_r4k.o dma.o vga.o serial.o i8254.o i8259.o ide.o
-#VL_OBJS+= #pckbd.o fdc.o m48t59.o
+VL_OBJS+= pckbd.o ps2.o mc146818rtc.o
+#VL_OBJS+= #fdc.o m48t59.o
 endif
 ifeq ($(TARGET_BASE_ARCH), sparc)
 ifeq ($(TARGET_ARCH), sparc64)
Index: qemu-work/hw/mips_r4k.c
===================================================================
--- qemu-work.orig/hw/mips_r4k.c	2006-11-20 01:21:18.000000000 +0000
+++ qemu-work/hw/mips_r4k.c	2006-11-20 01:21:22.000000000 +0000
@@ -1,7 +1,8 @@
 #include "vl.h"
 
 #define BIOS_FILENAME "mips_bios.bin"
-//#define BIOS_FILENAME "system.bin"
+#define LINUX_BOOT_FILENAME "linux_boot.bin"
+
 #define KERNEL_LOAD_ADDR 0x80010000
 #define INITRD_LOAD_ADDR 0x80800000
 
@@ -13,6 +14,7 @@
 
 extern FILE *logfile;
 
+static RTCState *rtc_state;
 static PITState *pit;
 
 static void pic_irq_request(void *opaque, int level)
@@ -110,6 +112,35 @@
     cpu_mips_update_count(env, 1, 0);
 }
 
+#define REG_EQUIPMENT_BYTE          0x14
+#define REG_IBM_CENTURY_BYTE        0x32
+#define REG_IBM_PS2_CENTURY_BYTE    0x37
+
+static inline int to_bcd(RTCState *s, int a)
+{
+    return ((a / 10) << 4) | (a % 10);
+}
+
+static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
+{
+    RTCState *s = rtc_state;
+    int val;
+    time_t ti;
+    struct tm *tm;
+
+    /* set the CMOS date */
+    time(&ti);
+    if (rtc_utc)
+        tm = gmtime(&ti);
+    else
+        tm = localtime(&ti);
+    rtc_set_date(s, tm);
+
+    val = to_bcd(s, (tm->tm_year / 100) + 19);
+    rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
+    rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
+}
+
 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
 			      uint32_t val)
 {
@@ -251,12 +282,15 @@
     cpu_mips_clock_init(env);
     cpu_mips_irqctrl_init();
 
+    rtc_state = rtc_init(0x70, 8);
+
     /* Register 64 KB of ISA IO space at 0x14000000 */
     isa_mmio_init(0x14000000, 0x00010000);
     isa_mem_base = 0x10000000;
 
     isa_pic = pic_init(pic_irq_request, env);
     pit = pit_init(0x40, 0);
+
     serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
     isa_vga_init(ds, phys_ram_base + ram_size, ram_size, 
                  vga_ram_size);
@@ -274,6 +308,11 @@
     for(i = 0; i < 2; i++)
         isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
                      bs_table[2 * i], bs_table[2 * i + 1]);
+
+    kbd_init();
+    DMA_init(1);
+
+    cmos_init(ram_size, boot_device, bs_table);
 }
 
 QEMUMachine mips_machine = {

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Date: Sat, 11 Nov 2006 20:02:40 -0500
From: Daniel Jacobowitz <drow@false.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] MIPS halt / reboot

The MIPS kernel already has a reset/halt device for qemu
(arch/mips/qemu/q-reset.c).  I have no idea at all where this came
from, but hey, it seems sensible enough to me so I implemented it
in qemu.

This requires a bit of additional mucking around, since MIPS doesn't
currently have any BIOS support, so I made the reset vector reload any
specified kernel and initrd.  Works in my Debian rootfs; very handy for
automated benchmarking.

-- 
Daniel Jacobowitz
CodeSourcery

---
 hw/mips_r4k.c           |  144 +++++++++++++++++++++++++++++++++---------------
 target-mips/cpu.h       |    8 ++
 target-mips/translate.c |   10 +++
 3 files changed, 116 insertions(+), 46 deletions(-)

Index: qemu-work/hw/mips_r4k.c
===================================================================
--- qemu-work.orig/hw/mips_r4k.c	2006-11-15 22:40:28.000000000 +0000
+++ qemu-work/hw/mips_r4k.c	2006-11-15 22:41:14.000000000 +0000
@@ -110,6 +110,93 @@
     cpu_mips_update_count(env, 1, 0);
 }
 
+static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
+			      uint32_t val)
+{
+    if ((addr & 0xffff) == 0 && val == 42)
+        qemu_system_reset_request ();
+    else if ((addr & 0xffff) == 4 && val == 42)
+        qemu_system_shutdown_request ();
+}
+
+static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
+{
+    return 0;
+}
+
+static CPUWriteMemoryFunc *mips_qemu_write[] = {
+    &mips_qemu_writel,
+    &mips_qemu_writel,
+    &mips_qemu_writel,
+};
+
+static CPUReadMemoryFunc *mips_qemu_read[] = {
+    &mips_qemu_readl,
+    &mips_qemu_readl,
+    &mips_qemu_readl,
+};
+
+static int mips_qemu_iomemtype = 0;
+
+void load_kernel (CPUState *env, int ram_size, const char *kernel_filename,
+		  const char *kernel_cmdline,
+		  const char *initrd_filename)
+{
+    int64_t entry = 0;
+    long kernel_size, initrd_size;
+
+    kernel_size = load_elf(kernel_filename, VIRT_TO_PHYS_ADDEND, &entry);
+    if (kernel_size >= 0)
+        env->PC = entry;
+    else {
+        kernel_size = load_image(kernel_filename,
+                                 phys_ram_base + KERNEL_LOAD_ADDR + VIRT_TO_PHYS_ADDEND);
+        if (kernel_size < 0) {
+            fprintf(stderr, "qemu: could not load kernel '%s'\n",
+                    kernel_filename);
+            exit(1);
+        }
+        env->PC = KERNEL_LOAD_ADDR;
+    }
+
+    /* load initrd */
+    initrd_size = 0;
+    if (initrd_filename) {
+        initrd_size = load_image(initrd_filename,
+                                 phys_ram_base + INITRD_LOAD_ADDR + VIRT_TO_PHYS_ADDEND);
+        if (initrd_size == (target_ulong) -1) {
+            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
+                    initrd_filename);
+            exit(1);
+        }
+    }
+
+    /* Store command line.  */
+    if (initrd_size > 0) {
+        int ret;
+        ret = sprintf(phys_ram_base + (16 << 20) - 256,
+                      "rd_start=0x%08x rd_size=%li ",
+                      INITRD_LOAD_ADDR,
+                      initrd_size);
+        strcpy (phys_ram_base + (16 << 20) - 256 + ret, kernel_cmdline);
+    }
+    else {
+        strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
+    }
+
+    *(int *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
+    *(int *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
+}
+
+static void main_cpu_reset(void *opaque)
+{
+    CPUState *env = opaque;
+    cpu_reset(env);
+
+    if (env->kernel_filename)
+        load_kernel (env, env->ram_size, env->kernel_filename,
+                     env->kernel_cmdline, env->initrd_filename);
+}
 
 void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
                     DisplayState *ds, const char **fd_filename, int snapshot,
@@ -117,19 +204,24 @@
                     const char *initrd_filename)
 {
     char buf[1024];
-    int64_t entry = 0;
     unsigned long bios_offset;
     int ret;
     CPUState *env;
-    long kernel_size;
     int i;
 
     env = cpu_init();
     register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
+    qemu_register_reset(main_cpu_reset, env);
 
     /* allocate RAM */
     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 
+    if (!mips_qemu_iomemtype) {
+        mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
+						     mips_qemu_write, NULL);
+    }
+    cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
+
     /* Try to load a BIOS image. If this fails, we continue regardless,
        but initialize the hardware ourselves. When a kernel gets
        preloaded we also initialize the hardware, since the BIOS wasn't
@@ -146,38 +238,13 @@
 		buf);
     }
 
-    kernel_size = 0;
     if (kernel_filename) {
-	kernel_size = load_elf(kernel_filename, VIRT_TO_PHYS_ADDEND, &entry);
-	if (kernel_size >= 0)
-	    env->PC = entry;
-	else {
-	    kernel_size = load_image(kernel_filename,
-                                     phys_ram_base + KERNEL_LOAD_ADDR + VIRT_TO_PHYS_ADDEND);
-            if (kernel_size < 0) {
-                fprintf(stderr, "qemu: could not load kernel '%s'\n",
-                        kernel_filename);
-                exit(1);
-            }
-            env->PC = KERNEL_LOAD_ADDR;
-	}
-
-        /* load initrd */
-        if (initrd_filename) {
-            if (load_image(initrd_filename,
-			   phys_ram_base + INITRD_LOAD_ADDR + VIRT_TO_PHYS_ADDEND)
-		== (target_ulong) -1) {
-                fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", 
-                        initrd_filename);
-                exit(1);
-            }
-        }
-
-	/* Store command line.  */
-        strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
-        /* FIXME: little endian support */
-        *(int *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
-        *(int *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
+        load_kernel (env, ram_size, kernel_filename, kernel_cmdline,
+		     initrd_filename);
+	env->ram_size = ram_size;
+	env->kernel_filename = kernel_filename;
+	env->kernel_cmdline = kernel_cmdline;
+	env->initrd_filename = initrd_filename;
     }
 
     /* Init internal devices */
Index: qemu-work/target-mips/cpu.h
===================================================================
--- qemu-work.orig/target-mips/cpu.h	2006-11-15 22:41:04.000000000 +0000
+++ qemu-work/target-mips/cpu.h	2006-11-15 22:41:14.000000000 +0000
@@ -182,7 +182,6 @@
     uint32_t CP0_ErrorEPC;
     uint32_t CP0_DESAVE;
     /* Qemu */
-    struct QEMUTimer *timer; /* Internal timer */
     int interrupt_request;
     jmp_buf jmp_env;
     int exception_index;
@@ -213,6 +212,13 @@
     int halted; /* TRUE if the CPU is in suspend state */
 
     CPU_COMMON
+
+    int ram_size;
+    const char *kernel_filename;
+    const char *kernel_cmdline;
+    const char *initrd_filename;
+
+    struct QEMUTimer *timer; /* Internal timer */
 };
 
 #include "cpu-all.h"
Index: qemu-work/target-mips/translate.c
===================================================================
--- qemu-work.orig/target-mips/translate.c	2006-11-15 22:41:04.000000000 +0000
+++ qemu-work/target-mips/translate.c	2006-11-15 22:41:14.000000000 +0000
@@ -2425,7 +2425,16 @@
     if (!env)
         return NULL;
     cpu_exec_init(env);
+    cpu_reset(env);
+    return env;
+}
+
+void cpu_reset (CPUMIPSState *env)
+{
+    memset(env, 0, offsetof(CPUMIPSState, breakpoints));
+
     tlb_flush(env, 1);
+
     /* Minimal init */
     env->PC = 0xBFC00000;
 #if defined (MIPS_USES_R4K_TLB)
@@ -2456,5 +2465,4 @@
 #ifdef MIPS_USES_FPU
     env->fcr0 = MIPS_FCR0;	
 #endif
-    return env;
 }

Re: [Qemu-devel] [PATCH 3/6] A cumulative MIPS patchset

[Aurelien Jarno]

On Tue, Nov 21, 2006 at 02:40:37PM +0000, Thiemo Seufer wrote:
> Hello All,

Hi !

> this patch adds more devices to the MIPS system emulation, most
> importantly a RTC emulation which e.g. keeps timestamps on a
> linux filesystem sane.
> 

I suggest to use the patch below instead. It is based on the patch I
posted [1] on the mailing list a few days ago. it moves the
initialisation of the RTC date/time into hw/mc146818rtc.c, to avoid
duplication of code. I guess all platform using this RTC chip will want
to setup at least the date and time.

[1] http://lists.gnu.org/archive/html/qemu-devel/2006-11/msg00165.html

Index: Makefile.target
===================================================================
RCS file: /sources/qemu/qemu/Makefile.target,v
retrieving revision 1.132
diff -u -r1.132 Makefile.target
--- Makefile.target	29 Oct 2006 15:38:28 -0000	1.132
+++ Makefile.target	21 Nov 2006 16:41:24 -0000
@@ -358,7 +358,8 @@
 endif
 ifeq ($(TARGET_ARCH), mips)
 VL_OBJS+= mips_r4k.o dma.o vga.o serial.o i8254.o i8259.o ide.o
-#VL_OBJS+= #pckbd.o fdc.o m48t59.o
+VL_OBJS+= pckbd.o ps2.o mc146818rtc.o
+#VL_OBJS+= #fdc.o m48t59.o
 endif
 ifeq ($(TARGET_BASE_ARCH), sparc)
 ifeq ($(TARGET_ARCH), sparc64)
Index: hw/mc146818rtc.c
===================================================================
RCS file: /sources/qemu/qemu/hw/mc146818rtc.c,v
retrieving revision 1.6
diff -u -r1.6 mc146818rtc.c
--- hw/mc146818rtc.c	3 Jun 2004 12:51:19 -0000	1.6
+++ hw/mc146818rtc.c	21 Nov 2006 16:41:25 -0000
@@ -380,6 +380,29 @@
     rtc_copy_date(s);
 }
 
+/* PC cmos mappings */
+#define REG_IBM_CENTURY_BYTE        0x32
+#define REG_IBM_PS2_CENTURY_BYTE    0x37
+
+void rtc_set_date_from_host(RTCState *s)
+{
+    time_t ti;
+    struct tm *tm;
+    int val;
+
+    /* set the CMOS date */
+    time(&ti);
+    if (rtc_utc)
+        tm = gmtime(&ti);
+    else
+        tm = localtime(&ti);
+    rtc_set_date(s, tm);
+
+    val = to_bcd(s, (tm->tm_year / 100) + 19);
+    rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
+    rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
+}
+
 static void rtc_save(QEMUFile *f, void *opaque)
 {
     RTCState *s = opaque;
@@ -444,6 +467,8 @@
     s->cmos_data[RTC_REG_C] = 0x00;
     s->cmos_data[RTC_REG_D] = 0x80;
 
+    rtc_set_date_from_host(s);
+
     s->periodic_timer = qemu_new_timer(vm_clock, 
                                        rtc_periodic_timer, s);
     s->second_timer = qemu_new_timer(vm_clock, 
Index: hw/mips_r4k.c
===================================================================
RCS file: /sources/qemu/qemu/hw/mips_r4k.c,v
retrieving revision 1.21
diff -u -r1.21 mips_r4k.c
--- hw/mips_r4k.c	29 Oct 2006 15:38:28 -0000	1.21
+++ hw/mips_r4k.c	21 Nov 2006 16:41:25 -0000
@@ -1,7 +1,8 @@
 #include "vl.h"
 
 #define BIOS_FILENAME "mips_bios.bin"
-//#define BIOS_FILENAME "system.bin"
+#define LINUX_BOOT_FILENAME "linux_boot.bin"
+
 #define KERNEL_LOAD_ADDR 0x80010000
 #define INITRD_LOAD_ADDR 0x80800000
 
@@ -13,6 +14,7 @@
 
 extern FILE *logfile;
 
+static RTCState *rtc_state;
 static PITState *pit;
 
 static void pic_irq_request(void *opaque, int level)
@@ -184,12 +186,15 @@
     cpu_mips_clock_init(env);
     cpu_mips_irqctrl_init();
 
+    rtc_state = rtc_init(0x70, 8);
+
     /* Register 64 KB of ISA IO space at 0x14000000 */
     isa_mmio_init(0x14000000, 0x00010000);
     isa_mem_base = 0x10000000;
 
     isa_pic = pic_init(pic_irq_request, env);
     pit = pit_init(0x40, 0);
+
     serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
     isa_vga_init(ds, phys_ram_base + ram_size, ram_size, 
                  vga_ram_size);
@@ -207,6 +212,9 @@
     for(i = 0; i < 2; i++)
         isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
                      bs_table[2 * i], bs_table[2 * i + 1]);
+
+    kbd_init();
+    DMA_init(1);
 }
 
 QEMUMachine mips_machine = {
Index: hw/pc.c
===================================================================
RCS file: /sources/qemu/qemu/hw/pc.c,v
retrieving revision 1.62
diff -u -r1.62 pc.c
--- hw/pc.c	24 Sep 2006 18:48:00 -0000	1.62
+++ hw/pc.c	21 Nov 2006 16:41:25 -0000
@@ -111,14 +111,6 @@
 /* PC cmos mappings */
 
 #define REG_EQUIPMENT_BYTE          0x14
-#define REG_IBM_CENTURY_BYTE        0x32
-#define REG_IBM_PS2_CENTURY_BYTE    0x37
-
-
-static inline int to_bcd(RTCState *s, int a)
-{
-    return ((a / 10) << 4) | (a % 10);
-}
 
 static int cmos_get_fd_drive_type(int fd0)
 {
@@ -171,18 +163,6 @@
     struct tm *tm;
     int i;
 
-    /* set the CMOS date */
-    time(&ti);
-    if (rtc_utc)
-        tm = gmtime(&ti);
-    else
-        tm = localtime(&ti);
-    rtc_set_date(s, tm);
-
-    val = to_bcd(s, (tm->tm_year / 100) + 19);
-    rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
-    rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
-
     /* various important CMOS locations needed by PC/Bochs bios */
 
     /* memory size */


-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

Re: [Qemu-devel] [PATCH 3/6] A cumulative MIPS patchset

[Thiemo Seufer]

Aurelien Jarno wrote:
> On Tue, Nov 21, 2006 at 02:40:37PM +0000, Thiemo Seufer wrote:
> > Hello All,
> 
> Hi !
> 
> > this patch adds more devices to the MIPS system emulation, most
> > importantly a RTC emulation which e.g. keeps timestamps on a
> > linux filesystem sane.
> > 
> 
> I suggest to use the patch below instead. It is based on the patch I
> posted [1] on the mailing list a few days ago. it moves the
> initialisation of the RTC date/time into hw/mc146818rtc.c, to avoid
> duplication of code. I guess all platform using this RTC chip will want
> to setup at least the date and time.

I included it in my current mips patchset, available from
http://people.debian.org/~ths/qemu/2006-11-26/


Thiemo

Re: [Qemu-devel] [PATCH 3/6] A cumulative MIPS patchset

[Dirk Behme]

Thiemo Seufer wrote:
> Aurelien Jarno wrote:
>>I suggest to use the patch below instead. It is based on the patch I
>>posted [1] on the mailing list a few days ago. it moves the
>>initialisation of the RTC date/time into hw/mc146818rtc.c, to avoid
>>duplication of code. I guess all platform using this RTC chip will want
>>to setup at least the date and time.
> 
> I included it in my current mips patchset, available from
> http://people.debian.org/~ths/qemu/2006-11-26/

I saw no other comments on the list, so any chance to get 
this patchset applied?

Dirk

Re: [Qemu-devel] [PATCH 3/6] A cumulative MIPS patchset

[Fabrice Bellard]

Dirk Behme wrote:
> Thiemo Seufer wrote:
> 
>> Aurelien Jarno wrote:
>>
>>> I suggest to use the patch below instead. It is based on the patch I
>>> posted [1] on the mailing list a few days ago. it moves the
>>> initialisation of the RTC date/time into hw/mc146818rtc.c, to avoid
>>> duplication of code. I guess all platform using this RTC chip will want
>>> to setup at least the date and time.
>>
>>
>> I included it in my current mips patchset, available from
>> http://people.debian.org/~ths/qemu/2006-11-26/
> 
> 
> I saw no other comments on the list, so any chance to get this patchset 
> applied?

I'll try to review it ASAP if no one does it before me :-)

BTW, I would be really interested by integrating a Malta board emulation 
so that proper PCI devices can be added.

Regards,

Fabrice.

Re: [Qemu-devel] [PATCH 3/6] A cumulative MIPS patchset

[Aurelien Jarno]

On Mon, Nov 27, 2006 at 10:45:04PM +0100, Fabrice Bellard wrote:
> Dirk Behme wrote:
> >Thiemo Seufer wrote:
> >
> >>Aurelien Jarno wrote:
> >>
> >>>I suggest to use the patch below instead. It is based on the patch I
> >>>posted [1] on the mailing list a few days ago. it moves the
> >>>initialisation of the RTC date/time into hw/mc146818rtc.c, to avoid
> >>>duplication of code. I guess all platform using this RTC chip will want
> >>>to setup at least the date and time.
> >>
> >>
> >>I included it in my current mips patchset, available from
> >>http://people.debian.org/~ths/qemu/2006-11-26/
> >
> >
> >I saw no other comments on the list, so any chance to get this patchset 
> >applied?
> 
> I'll try to review it ASAP if no one does it before me :-)
> 
> BTW, I would be really interested by integrating a Malta board emulation 
> so that proper PCI devices can be added.
> 

I am currently working on that. I still don't know when I will be able
to finish that, maybe next week-end. 

Currently I am able to boot an unmodified mipsel Malta kernel, with the
PIIX3 IDE controller and a PCI Ethernet card. I still have some PCI 
ressources problems, and I haven't looked at the endianess problem (the
GT64120 northbridge can swap the data on the PCI bus depending on a flag
in it's configuration area). Also the emulated floppy drive does not 
work.

Cheers,
Aurelien

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

Re: [Qemu-devel] [PATCH 3/6] A cumulative MIPS patchset

[Fabrice Bellard]

Aurelien Jarno wrote:
> On Mon, Nov 27, 2006 at 10:45:04PM +0100, Fabrice Bellard wrote:
> 
>>Dirk Behme wrote:
>>
>>>Thiemo Seufer wrote:
>>>
>>>
>>>>Aurelien Jarno wrote:
>>>>
>>>>
>>>>>I suggest to use the patch below instead. It is based on the patch I
>>>>>posted [1] on the mailing list a few days ago. it moves the
>>>>>initialisation of the RTC date/time into hw/mc146818rtc.c, to avoid
>>>>>duplication of code. I guess all platform using this RTC chip will want
>>>>>to setup at least the date and time.
>>>>
>>>>
>>>>I included it in my current mips patchset, available from
>>>>http://people.debian.org/~ths/qemu/2006-11-26/
>>>
>>>
>>>I saw no other comments on the list, so any chance to get this patchset 
>>>applied?
>>
>>I'll try to review it ASAP if no one does it before me :-)
>>
>>BTW, I would be really interested by integrating a Malta board emulation 
>>so that proper PCI devices can be added.
>>
> 
> 
> I am currently working on that. I still don't know when I will be able
> to finish that, maybe next week-end. 
> 
> Currently I am able to boot an unmodified mipsel Malta kernel, with the
> PIIX3 IDE controller and a PCI Ethernet card. I still have some PCI 
> ressources problems, and I haven't looked at the endianess problem (the
> GT64120 northbridge can swap the data on the PCI bus depending on a flag
> in it's configuration area). Also the emulated floppy drive does not 
> work.

Very interesting. Send the code as soon as you feel it is usable !

Regards,

Fabrice.

Re: [Qemu-devel] [PATCH 3/6] A cumulative MIPS patchset

[Fabrice Bellard]

Aurelien Jarno wrote:
> On Mon, Nov 27, 2006 at 10:45:04PM +0100, Fabrice Bellard wrote:
> 
>>Dirk Behme wrote:
>>
>>>Thiemo Seufer wrote:
>>>
>>>
>>>>Aurelien Jarno wrote:
>>>>
>>>>
>>>>>I suggest to use the patch below instead. It is based on the patch I
>>>>>posted [1] on the mailing list a few days ago. it moves the
>>>>>initialisation of the RTC date/time into hw/mc146818rtc.c, to avoid
>>>>>duplication of code. I guess all platform using this RTC chip will want
>>>>>to setup at least the date and time.
>>>>
>>>>
>>>>I included it in my current mips patchset, available from
>>>>http://people.debian.org/~ths/qemu/2006-11-26/
>>>
>>>
>>>I saw no other comments on the list, so any chance to get this patchset 
>>>applied?
>>
>>I'll try to review it ASAP if no one does it before me :-)
>>
>>BTW, I would be really interested by integrating a Malta board emulation 
>>so that proper PCI devices can be added.
>>
> 
> 
> I am currently working on that. I still don't know when I will be able
> to finish that, maybe next week-end. 
> 
> Currently I am able to boot an unmodified mipsel Malta kernel, with the
> PIIX3 IDE controller and a PCI Ethernet card. I still have some PCI 
> ressources problems, and I haven't looked at the endianess problem (the
> GT64120 northbridge can swap the data on the PCI bus depending on a flag
> in it's configuration area). Also the emulated floppy drive does not 
> work.

Very interesting. Send the code as soon as you feel it is usable !

Regards,

Fabrice.