From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1GxKUY-0000cu-83 for qemu-devel@nongnu.org; Thu, 21 Dec 2006 04:45:34 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1GxKUX-0000c5-LS for qemu-devel@nongnu.org; Thu, 21 Dec 2006 04:45:33 -0500 Received: from [129.104.30.34] (helo=mx1.polytechnique.org) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1GxKUW-00045W-OY for qemu-devel@nongnu.org; Thu, 21 Dec 2006 04:45:33 -0500 Message-ID: <458A57B6.3080901@bellard.org> Date: Thu, 21 Dec 2006 10:45:26 +0100 From: Fabrice Bellard MIME-Version: 1.0 Subject: Re: [Qemu-devel] qemu hw/mips_r4k.c target-mips/cpu.h target-mip... References: In-Reply-To: Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: ths@networkno.de Cc: qemu-devel@nongnu.org You should suppress the SIGN_EXTEND32() macro and just use an 'int32_t' cast... Fabrice. Thiemo Seufer wrote: > CVSROOT: /sources/qemu > Module name: qemu > Changes by: Thiemo Seufer 06/12/21 01:19:56 > > Modified files: > hw : mips_r4k.c > target-mips : cpu.h exec.h fop_template.c helper.c > mips-defs.h op.c op_helper.c op_helper_mem.c > op_mem.c op_template.c translate.c > > Log message: > Preliminiary MIPS64 support, disabled by default due to performance impact. > > CVSWeb URLs: > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/mips_r4k.c?cvsroot=qemu&r1=1.24&r2=1.25 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/cpu.h?cvsroot=qemu&r1=1.13&r2=1.14 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/exec.h?cvsroot=qemu&r1=1.12&r2=1.13 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/fop_template.c?cvsroot=qemu&r1=1.1&r2=1.2 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemu&r1=1.19&r2=1.20 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/mips-defs.h?cvsroot=qemu&r1=1.5&r2=1.6 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.16&r2=1.17 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemu&r1=1.20&r2=1.21 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper_mem.c?cvsroot=qemu&r1=1.3&r2=1.4 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_mem.c?cvsroot=qemu&r1=1.4&r2=1.5 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_template.c?cvsroot=qemu&r1=1.1&r2=1.2 > http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.28&r2=1.29 > > > _______________________________________________ > Qemu-devel mailing list > Qemu-devel@nongnu.org > http://lists.nongnu.org/mailman/listinfo/qemu-devel > >