From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HSe6w-0005f0-IC for qemu-devel@nongnu.org; Sat, 17 Mar 2007 14:58:38 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HSe6t-0005Yy-Uo for qemu-devel@nongnu.org; Sat, 17 Mar 2007 14:58:38 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HSe6t-0005Yb-QF for qemu-devel@nongnu.org; Sat, 17 Mar 2007 13:58:35 -0500 Received: from moutng.kundenserver.de ([212.227.126.186]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1HSe5d-00017C-H8 for qemu-devel@nongnu.org; Sat, 17 Mar 2007 14:57:17 -0400 Message-ID: <45FC3A07.3070302@weilnetz.de> Date: Sat, 17 Mar 2007 19:57:11 +0100 From: Stefan Weil MIME-Version: 1.0 Subject: Re: [Qemu-devel] [Bug] MIPS code fails at branch instruction References: <45FB245C.2010900@mail.berlios.de> <20070317004628.GE25863@networkno.de> <45FBD30D.6070403@mail.berlios.de> <20070317143106.GF25863@networkno.de> In-Reply-To: <20070317143106.GF25863@networkno.de> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Thiemo Seufer , QEMU Developers Thiemo Seufer wrote > Stefan Weil wrote: >> So an emulation has several options: >> >> 1. Show undefined behaviour (this is what it does today). >> 2. Emulate the behaviour of existing CPUs as far as possible. >> As different CPUs behave different, this must depend on the >> current CPU. >> 3. Display an error message. > (3) is bad, as it amounts to a DoS. DoS = Denial of Service? Then (1) is some kind of DoS, because QEMU hangs with code which works on real hardware. I don't understand why an error message (something printed to stdout or stderr like other boot messages of QEMU) amounts to a DoS. >> The current solution (1) is not good, because users get crashes >> and don't know the reason, and experienced users spend a lot of >> time with debugging (at least I did). >> >> Solution (2) is needed to run existing binary code. >> >> Solution (3) is the minimum I expect of an emulation like QEMU. >> >> I prefer a mix of solutions (2) and (3): display a message and >> try to emulate the original behaviour. >> >> Do you agree, and would you accept patches which implement this? > If the AR7 CPU spec defines the semantics of branch delay slots more > precisely than the architecture spec then I'll consider a patch. AR7 claims to use a 4KEc CPU, so there is only the official spec from MIPS. > If this isn't the case then I ask you to use a non-broken compiler/ > assembly code. What about closed source binary code (firmware in my case)? Of course it can be patched, but this is more work than implementing (2) and (3) in QEMU. Stefan