* [Qemu-devel] [BUG] [PATCH] Fix emulation for MIPS CP3 opcode?
@ 2007-05-01 10:58 Stefan Weil
2007-05-01 12:54 ` Thiemo Seufer
0 siblings, 1 reply; 2+ messages in thread
From: Stefan Weil @ 2007-05-01 10:58 UTC (permalink / raw)
To: QEMU Developers
[-- Attachment #1: Type: text/plain, Size: 118 bytes --]
Maybe the CpU exception for OPC_CP3 should
set CP0 Cause CE to 3, not 1?
If you agree, my patch fixes this.
Stefan
[-- Attachment #2: mips.patch --]
[-- Type: text/x-diff, Size: 403 bytes --]
Index: target-mips/translate.c
===================================================================
--- target-mips/translate.c (Revision 622)
+++ target-mips/translate.c (Arbeitskopie)
@@ -5069,7 +5069,7 @@
break;
}
} else {
- generate_exception_err(ctx, EXCP_CpU, 1);
+ generate_exception_err(ctx, EXCP_CpU, 3);
}
break;
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [BUG] [PATCH] Fix emulation for MIPS CP3 opcode?
2007-05-01 10:58 [Qemu-devel] [BUG] [PATCH] Fix emulation for MIPS CP3 opcode? Stefan Weil
@ 2007-05-01 12:54 ` Thiemo Seufer
0 siblings, 0 replies; 2+ messages in thread
From: Thiemo Seufer @ 2007-05-01 12:54 UTC (permalink / raw)
To: Stefan Weil; +Cc: QEMU Developers
Stefan Weil wrote:
> Maybe the CpU exception for OPC_CP3 should
> set CP0 Cause CE to 3, not 1?
No it shouldn't. CP3 is obsolete since MIPS IV, and was unused before.
It was replaced/renamed to CP1x. If an instruction for CP1x raises an
exception it should signal as CP1 exception.
Thiemo
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2007-05-01 13:00 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2007-05-01 10:58 [Qemu-devel] [BUG] [PATCH] Fix emulation for MIPS CP3 opcode? Stefan Weil
2007-05-01 12:54 ` Thiemo Seufer
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).