From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Hk4FC-0007rN-SS for qemu-devel@nongnu.org; Fri, 04 May 2007 16:19:10 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Hk4FA-0007rA-Va for qemu-devel@nongnu.org; Fri, 04 May 2007 16:19:10 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Hk4FA-0007r7-RJ for qemu-devel@nongnu.org; Fri, 04 May 2007 16:19:08 -0400 Received: from moutng.kundenserver.de ([212.227.126.188]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Hk48U-0005pr-MV for qemu-devel@nongnu.org; Fri, 04 May 2007 16:12:14 -0400 Message-ID: <463B939A.1090508@mail.berlios.de> Date: Fri, 04 May 2007 22:12:10 +0200 From: Stefan Weil MIME-Version: 1.0 Subject: [Qemu-devel] [BUG] QEMU crash during cpu reset (MIPS regression) Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: QEMU Developers Resetting a MIPS cpu currently does not work, because important entries in env (CPUMIPSState) are filled with 0 at the beginning of function cpu_reset. At system start, these values are set in cpu_mips_register. After reset, env->nb_tlb == 0 results in a division by zero crash of QEMU. We can either re-arrange the entries in CPUMIPSState (move those which must not be zero'ed to the end), or cpu_reset must call cpu_mips_register. Which solution is better? Stefan