[Qemu-devel] qemu Changelog gdbstub.c target-mips/TODO targe...

[Qemu-devel] qemu Changelog gdbstub.c target-mips/TODO targe...

[Thiemo Seufer]

CVSROOT:	/sources/qemu
Module name:	qemu
Changes by:	Thiemo Seufer <ths>	07/05/07 13:55:33

Modified files:
	.              : Changelog gdbstub.c 
	target-mips    : TODO cpu.h exec.h fop_template.c helper.c op.c 
	                 op_mem.c translate.c translate_init.c 

Log message:
	MIPS 64-bit FPU support, plus some collateral bugfixes in the
	conditional branch handling.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/Changelog?cvsroot=qemu&r1=1.134&r2=1.135
http://cvs.savannah.gnu.org/viewcvs/qemu/gdbstub.c?cvsroot=qemu&r1=1.53&r2=1.54
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/TODO?cvsroot=qemu&r1=1.9&r2=1.10
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/cpu.h?cvsroot=qemu&r1=1.30&r2=1.31
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/exec.h?cvsroot=qemu&r1=1.24&r2=1.25
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/fop_template.c?cvsroot=qemu&r1=1.2&r2=1.3
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemu&r1=1.35&r2=1.36
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.44&r2=1.45
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_mem.c?cvsroot=qemu&r1=1.8&r2=1.9
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.68&r2=1.69
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate_init.c?cvsroot=qemu&r1=1.6&r2=1.7

Re: [Qemu-devel] [PATCH] qemu Changelog gdbstub.c target-mips/TODO targe...

[Stefan Weil]

[-- Attachment #1: Type: text/plain, Size: 1559 bytes --]

gcc on MIPS defines "mips", so for the new MIPS host
a small patch (or a variable rename) in op.c is needed.

Stefan


Thiemo Seufer schrieb:
> CVSROOT:	/sources/qemu
> Module name:	qemu
> Changes by:	Thiemo Seufer <ths>	07/05/07 13:55:33
>
> Modified files:
> 	.              : Changelog gdbstub.c 
> 	target-mips    : TODO cpu.h exec.h fop_template.c helper.c op.c 
> 	                 op_mem.c translate.c translate_init.c 
>
> Log message:
> 	MIPS 64-bit FPU support, plus some collateral bugfixes in the
> 	conditional branch handling.
>
> CVSWeb URLs:
> http://cvs.savannah.gnu.org/viewcvs/qemu/Changelog?cvsroot=qemu&r1=1.134&r2=1.135
> http://cvs.savannah.gnu.org/viewcvs/qemu/gdbstub.c?cvsroot=qemu&r1=1.53&r2=1.54
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/TODO?cvsroot=qemu&r1=1.9&r2=1.10
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/cpu.h?cvsroot=qemu&r1=1.30&r2=1.31
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/exec.h?cvsroot=qemu&r1=1.24&r2=1.25
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/fop_template.c?cvsroot=qemu&r1=1.2&r2=1.3
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemu&r1=1.35&r2=1.36
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.44&r2=1.45
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_mem.c?cvsroot=qemu&r1=1.8&r2=1.9
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.68&r2=1.69
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate_init.c?cvsroot=qemu&r1=1.6&r2=1.7


[-- Attachment #2: op.patch --]
[-- Type: text/x-diff, Size: 332 bytes --]

Index: target-mips/op.c
===================================================================
--- target-mips/op.c	(Revision 656)
+++ target-mips/op.c	(Arbeitskopie)
@@ -1656,6 +1656,7 @@
            (ieee & float_flag_invalid) << 4;
 }
 
+#undef mips
 inline char mips_ex_to_ieee(char mips)
 {
     return (mips & FP_INEXACT) << 5 |

Re: [Qemu-devel] [BUG] [PATCH] qemu Changelog gdbstub.c target-mips/TODO targe...

[Stefan Weil]

[-- Attachment #1: Type: text/plain, Size: 526 bytes --]

For MIPS 4KEcR1 enabling of interrupts (C0 status) no longer worked.
The patch adds the missing declaration which fixes this behaviour.

Stefan

Thiemo Seufer schrieb:
> CVSROOT: /sources/qemu
> Module name: qemu
> Changes by: Thiemo Seufer <ths> 07/05/07 13:55:33
>
> Modified files:
> . : Changelog gdbstub.c
> target-mips : TODO cpu.h exec.h fop_template.c helper.c op.c
> op_mem.c translate.c translate_init.c
>
> Log message:
> MIPS 64-bit FPU support, plus some collateral bugfixes in the
> conditional branch handling.

[-- Attachment #2: translate_init.patch --]
[-- Type: text/x-diff, Size: 534 bytes --]

Index: target-mips/translate_init.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/translate_init.c,v
retrieving revision 1.7
diff -u -b -B -r1.7 translate_init.c
--- target-mips/translate_init.c	7 May 2007 13:55:33 -0000	1.7
+++ target-mips/translate_init.c	10 May 2007 18:06:35 -0000
@@ -98,6 +98,7 @@
         .CP0_Config3 = MIPS_CONFIG3,
         .SYNCI_Step = 32,
         .CCRes = 2,
+        .Status_rw_bitmask = 0x3278FF17,
     },
     {
         .name = "4KEc",