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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id d7-20020aa78147000000b00571cdbd0771sm6458387pfn.102.2023.02.22.15.30.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Feb 2023 15:30:22 -0800 (PST) Message-ID: <46906c2f-258f-802e-dd5c-16f3b38b1044@linaro.org> Date: Wed, 22 Feb 2023 13:30:19 -1000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH] target/i386: Fix BZHI instruction Content-Language: en-US From: Richard Henderson To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com References: <20230114233206.3118472-1-richard.henderson@linaro.org> <028cae76-5b52-76e0-9294-6477cbb89a28@linaro.org> In-Reply-To: <028cae76-5b52-76e0-9294-6477cbb89a28@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::443; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x443.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.102, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Ping 2. r~ On 2/15/23 20:50, Richard Henderson wrote: > Ping. > > r~ > > On 1/14/23 13:32, Richard Henderson wrote: >> We did not correctly handle N >= operand size. >> >> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1374 >> Signed-off-by: Richard Henderson >> --- >>   tests/tcg/i386/test-i386-bmi2.c |  3 +++ >>   target/i386/tcg/emit.c.inc      | 14 +++++++------- >>   2 files changed, 10 insertions(+), 7 deletions(-) >> >> diff --git a/tests/tcg/i386/test-i386-bmi2.c b/tests/tcg/i386/test-i386-bmi2.c >> index 982d4abda4..0244df7987 100644 >> --- a/tests/tcg/i386/test-i386-bmi2.c >> +++ b/tests/tcg/i386/test-i386-bmi2.c >> @@ -123,6 +123,9 @@ int main(int argc, char *argv[]) { >>       result = bzhiq(mask, 0x1f); >>       assert(result == (mask & ~(-1 << 30))); >> +    result = bzhiq(mask, 0x40); >> +    assert(result == mask); >> + >>       result = rorxq(0x2132435465768798, 8); >>       assert(result == 0x9821324354657687); >> diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc >> index 4d7702c106..1eace1231a 100644 >> --- a/target/i386/tcg/emit.c.inc >> +++ b/target/i386/tcg/emit.c.inc >> @@ -1143,20 +1143,20 @@ static void gen_BLSR(DisasContext *s, CPUX86State *env, >> X86DecodedInsn *decode) >>   static void gen_BZHI(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode) >>   { >>       MemOp ot = decode->op[0].ot; >> -    TCGv bound; >> +    TCGv bound = tcg_constant_tl(ot == MO_64 ? 63 : 31); >> +    TCGv zero = tcg_constant_tl(0); >> +    TCGv mone = tcg_constant_tl(-1); >> -    tcg_gen_ext8u_tl(s->T1, cpu_regs[s->vex_v]); >> -    bound = tcg_constant_tl(ot == MO_64 ? 63 : 31); >> +    tcg_gen_ext8u_tl(s->T1, s->T1); >>       /* >>        * Note that since we're using BMILG (in order to get O >>        * cleared) we need to store the inverse into C. >>        */ >> -    tcg_gen_setcond_tl(TCG_COND_LT, cpu_cc_src, s->T1, bound); >> -    tcg_gen_movcond_tl(TCG_COND_GT, s->T1, s->T1, bound, bound, s->T1); >> +    tcg_gen_setcond_tl(TCG_COND_LEU, cpu_cc_src, s->T1, bound); >> -    tcg_gen_movi_tl(s->A0, -1); >> -    tcg_gen_shl_tl(s->A0, s->A0, s->T1); >> +    tcg_gen_shl_tl(s->A0, mone, s->T1); >> +    tcg_gen_movcond_tl(TCG_COND_LEU, s->A0, s->T1, bound, s->A0, zero); >>       tcg_gen_andc_tl(s->T0, s->T0, s->A0); >>       gen_op_update1_cc(s); >