From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:53889) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RTt0N-0003dS-3s for qemu-devel@nongnu.org; Fri, 25 Nov 2011 05:27:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RTt0M-0003Kr-48 for qemu-devel@nongnu.org; Fri, 25 Nov 2011 05:27:39 -0500 Received: from smtp.cs.ucla.edu ([131.179.128.62]:47666) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RTt0L-0003Ju-Ur for qemu-devel@nongnu.org; Fri, 25 Nov 2011 05:27:38 -0500 Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp.cs.ucla.edu (Postfix) with ESMTP id 6E62DA60006 for ; Fri, 25 Nov 2011 02:27:29 -0800 (PST) Received: from smtp.cs.ucla.edu ([127.0.0.1]) by localhost (smtp.cs.ucla.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bEYo4QQPiVYJ for ; Fri, 25 Nov 2011 02:27:29 -0800 (PST) Received: from mail.cs.ucla.edu (mail.cs.ucla.edu [131.179.128.60]) by smtp.cs.ucla.edu (Postfix) with ESMTP id 260CEA60001 for ; Fri, 25 Nov 2011 02:27:29 -0800 (PST) Date: Fri, 25 Nov 2011 02:27:29 -0800 (PST) From: Gauresh Rane Message-ID: <46c4dcf1-22dc-4ea8-b9fb-f13e176261ec@mail.cs.ucla.edu> In-Reply-To: <519552ce-93df-4c90-82c6-1938d72bff72@mail.cs.ucla.edu> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Subject: [Qemu-devel] Problem with translating on ARM and Qemu beginner question List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Hi, I am working on developing a simulator on qemu. I am faced with a bug and I have tried solving it for three days now with no success: Here is my problem: I trying to simulate LPC 1768 cortex m3 based processor on qemu. But I am unable to get beyond the libc_init_array in the newlib. My qemu cpu jumps to program counter 0 when on jump inside init function of __libc_init_array of newlib. Here is the disassembly code for init: Called from libc_init_array 0000042c <_init>: 291 42c: b5f8 push {r3, r4, r5, r6, r7, lr} 292 42e: bf00 nop 293 430: bcf8 pop {r3, r4, r5, r6, r7} 294 432: bc08 pop {r3} 295 434: 469e mov lr, r3 296 436: 4770 bx lr I stepped through the intermediate code generation in qemu which looks fine to me. Also, I am not able to figure one part in qemu that is how is the cpu environment like registers for a processor updated. Any help would be highly appreciated. Thanks, Regards, Gauresh Rane Grad Student CS Department UCLA