Re: [PATCH 2/9] target/microblaze: Split out mb_transaction_failed_internal

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

On 12/2/25 23:01, Richard Henderson wrote:
> Use an explicit 64-bit type for the address to store in EAR.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/microblaze/op_helper.c | 70 +++++++++++++++++++++--------------
>   1 file changed, 42 insertions(+), 28 deletions(-)


> +static void mb_transaction_failed_internal(CPUState *cs, hwaddr physaddr,
> +                                           uint64_t addr, unsigned size,
> +                                           MMUAccessType access_type,
> +                                           uintptr_t retaddr)
> +{
> +    CPUMBState *env = cpu_env(cs);
> +    MicroBlazeCPU *cpu = env_archcpu(env);
> +    const char *access_name = "INVALID";
> +    bool take = env->msr & MSR_EE;
> +    uint32_t esr = ESR_EC_DATA_BUS;
> +
> +    switch (access_type) {
> +    case MMU_INST_FETCH:
> +        access_name = "INST_FETCH";
> +        esr = ESR_EC_INSN_BUS;
> +        take &= cpu->cfg.iopb_bus_exception;
> +        break;
> +    case MMU_DATA_LOAD:
> +        access_name = "DATA_LOAD";
> +        take &= cpu->cfg.dopb_bus_exception;
> +        break;
> +    case MMU_DATA_STORE:
> +        access_name = "DATA_STORE";
> +        take &= cpu->cfg.dopb_bus_exception;
> +        break;
> +    }
> +
> +    qemu_log_mask(CPU_LOG_INT, "Transaction failed: addr 0x%" PRIx64
> +                  "physaddr 0x" HWADDR_FMT_plx " size %d access-type %s (%s)\n",
> +                  addr, physaddr, size, access_name,
> +                  take ? "TAKEN" : "DROPPED");

Helpful.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

> +
> +    if (take) {
> +        env->esr = esr;
> +        env->ear = addr;
> +        cs->exception_index = EXCP_HW_EXCP;
> +        cpu_loop_exit_restore(cs, retaddr);
> +    }
> +}