[Qemu-devel] U-Boot patch for qemu -M mips

[Qemu-devel] U-Boot patch for qemu -M mips

[Vlad Lungu]

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Re: [Qemu-devel] U-Boot patch for qemu -M mips

[Thiemo Seufer]

Vlad Lungu wrote:
>  Fix for mips GOT relocation bug, NE2000 bugs, add support for qemu -M mips target.
[snip]
>  diff --git a/board/qemu-mips/config.mk b/board/qemu-mips/config.mk
>  new file mode 100644
>  index 0000000..39eb60a
>  --- /dev/null
>  +++ b/board/qemu-mips/config.mk
>  @@ -0,0 +1,32 @@
>  +#
>  +# (C) Copyright 2003
>  +# Wolfgang Denk, DENX Software Engineering, [3]wd@denx.de.
>  +#
>  +# See file CREDITS for list of people who contributed to this
>  +# project.
>  +#
>  +# This program is free software; you can redistribute it and/or
>  +# modify it under the terms of the GNU General Public License as
>  +# published by the Free Software Foundation; either version 2 of
>  +# the License, or (at your option) any later version.
>  +#
>  +# This program is distributed in the hope that it will be useful,
>  +# but WITHOUT ANY WARRANTY; without even the implied warranty of
>  +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>  +# GNU General Public License for more details.
>  +#
>  +# You should have received a copy of the GNU General Public License
>  +# along with this program; if not, write to the Free Software
>  +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>  +# MA 02111-1307 USA
>  +#
>  +
>  +#
>  +# AMD development board AMD Alchemy DbAu1x00, MIPS32 core

Incorrect comment.

>  +#
>  +
>  +# ROM version
>  +TEXT_BASE = 0xbfc00000
>  +
>  +# RAM version
>  +#TEXT_BASE = 0x80100000

This could be as low as 0x80001000 (assuming the space for exception
handlers isn't reserved by other means).

[snip]
>  diff --git a/board/qemu-mips/lowlevel_init.S b/board/qemu-mips/lowlevel_init.S
>  new file mode 100644
>  index 0000000..855e8ab
>  --- /dev/null
>  +++ b/board/qemu-mips/lowlevel_init.S
>  @@ -0,0 +1,47 @@
>  +/* Memory sub-system initialization code */
>  +
>  +#include <config.h>
>  +#include <version.h>
>  +#include <asm/regdef.h>
>  +#include <asm/mipsregs.h>
>  +
>  +       .text
>  +       .set noreorder
>  +       .set mips32
>  +
>  +       .globl  lowlevel_init
>  +lowlevel_init:
>  +
>  +       /*
>  +        * Step 2) Establish Status Register
>  +        * (set BEV, clear ERL, clear EXL, clear IE)
>  +        */
>  +       li      t1, 0x00400000
>  +       mtc0    t1, CP0_STATUS
>  +
>  +       /*
>  +        * Step 3) Establish CP0 Config0
>  +        * (set OD, set K0=3)
>  +        */
>  +       li      t1, 0x00080003
>  +       mtc0    t1, CP0_CONFIG

OD is a processor-specific flag, it does nothing on Qemu.

>  +       /*
>  +        * Step 5) Disable the performance counters
>  +        */
>  +       mtc0    zero, CP0_PERFORMANCE
>  +       nop

This field isn't required to exist (as per architecture spec), which
means you can get an exception when writing it. Since perfctr
interrupts are guaranteed to be disabled, the best option is not to
touch the register in early startup code.

(If you want to use performance counters, first check via the config
registers if they are implemented. You won't have much luck on Qemu:
The registers are implemented, but they don't do anything useful.)

>  +       /*
>  +        * Step 7) Establish Cause
>  +        * (set IV bit)
>  +        */
>  +       li      t1, 0x00800000
>  +       mtc0    t1, CP0_CAUSE
>  +
>  +       /* Establish Wired (and Random) */
>  +       mtc0    zero, CP0_WIRED
>  +       nop
>  +
>  +       j       ra
>  +       nop
>  diff --git a/board/qemu-mips/qemu-mips.c b/board/qemu-mips/qemu-mips.c
>  new file mode 100644
>  index 0000000..76c093c
>  --- /dev/null
>  +++ b/board/qemu-mips/qemu-mips.c
>  @@ -0,0 +1,48 @@
>  +/*
>  + * (C) Copyright 2007
>  + * [5]vlad@comsys.ro

A name in addition would look nicer. :-)

>  + *
>  + * See file CREDITS for list of people who contributed to this
>  + * project.
>  + *
>  + * This program is free software; you can redistribute it and/or
>  + * modify it under the terms of the GNU General Public License as
>  + * published by the Free Software Foundation; either version 2 of
>  + * the License, or (at your option) any later version.
>  + *
>  + * This program is distributed in the hope that it will be useful,
>  + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>  + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>  + * GNU General Public License for more details.
>  + *
>  + * You should have received a copy of the GNU General Public License
>  + * along with this program; if not, write to the Free Software
>  + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>  + * MA 02111-1307 USA
>  + */
>  +
>  +#include <common.h>
>  +#include <command.h>
>  +#include <asm/mipsregs.h>
>  +
>  +long int initdram(int board_type)
>  +{
>  +       /* Sdram is setup by assembler code */
>  +       /* If memory could be changed, we should return the true value here */
>  +       return MEM_SIZE*1024*1024;

Qemu gets the amount of RAM passed via a command line switch, the
qemu-mips emulation sets up a Linux kernel like "command line" in
memory where u-boot could parse it from.

>  +}
>  +
>  +
>  +int checkboard (void)
>  +{
>  +       u32 proc_id;
>  +
>  +       proc_id = read_32bit_cp0_register(CP0_PRID);
>  +
>  +       switch (proc_id >> 24) {
>  +       default:
>  +               printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
>  +       }
>  +
>  +       return 0;
>  +}

Huh? What is this code good for?


Thiemo

Re: [Qemu-devel] U-Boot patch for qemu -M mips

[Vlad Lungu]

Thiemo Seufer wrote:
> Vlad Lungu wrote:
>   
>>  Fix for mips GOT relocation bug, NE2000 bugs, add support for qemu -M mips target.
>>     
> [snip]
>   
>>  diff --git a/board/qemu-mips/config.mk b/board/qemu-mips/config.mk
>>     
[snip]
>>  +#
>>  +# AMD development board AMD Alchemy DbAu1x00, MIPS32 core
>>     
>
> Incorrect comment.
>
>   
didn't spot that
>>  +#
>>  +
>>  +# ROM version
>>  +TEXT_BASE = 0xbfc00000
>>  +
>>  +# RAM version
>>  +#TEXT_BASE = 0x80100000
>>     
>
> This could be as low as 0x80001000 (assuming the space for exception
> handlers isn't reserved by other means).
>   
I think I saw that difference in Linux 2.6 too. I suppose you're right.
> [snip]
>   
>>  diff --git a/board/qemu-mips/lowlevel_init.S b/board/qemu-mips/lowlevel_init.S
>>  new file mode 100644
>>  index 0000000..855e8ab
>>  --- /dev/null
>>  +++ b/board/qemu-mips/lowlevel_init.S
>>  @@ -0,0 +1,47 @@
>>  +/* Memory sub-system initialization code */
>>  +
>>  +#include <config.h>
>>  +#include <version.h>
>>  +#include <asm/regdef.h>
>>  +#include <asm/mipsregs.h>
>>  +
>>  +       .text
>>  +       .set noreorder
>>  +       .set mips32
>>  +
>>  +       .globl  lowlevel_init
>>  +lowlevel_init:
>>  +
>>  +       /*
>>  +        * Step 2) Establish Status Register
>>  +        * (set BEV, clear ERL, clear EXL, clear IE)
>>  +        */
>>  +       li      t1, 0x00400000
>>  +       mtc0    t1, CP0_STATUS
>>  +
>>  +       /*
>>  +        * Step 3) Establish CP0 Config0
>>  +        * (set OD, set K0=3)
>>  +        */
>>  +       li      t1, 0x00080003
>>  +       mtc0    t1, CP0_CONFIG
>>     
>
> OD is a processor-specific flag, it does nothing on Qemu.
>
>   
>>  +       /*
>>  +        * Step 5) Disable the performance counters
>>  +        */
>>  +       mtc0    zero, CP0_PERFORMANCE
>>  +       nop
>>     
>
> This field isn't required to exist (as per architecture spec), which
> means you can get an exception when writing it. Since perfctr
> interrupts are guaranteed to be disabled, the best option is not to
> touch the register in early startup code.
>
> (If you want to use performance counters, first check via the config
> registers if they are implemented. You won't have much luck on Qemu:
> The registers are implemented, but they don't do anything useful.)
>   
Well, I didn't get any exception . And nobody complained about OD 
either. The stuff that barfed on me, I deleted right away.
I'll delete this too, no problem.
>>  +       /*
>>  +        * Step 7) Establish Cause
>>  +        * (set IV bit)
>>  +        */
>>  +       li      t1, 0x00800000
>>  +       mtc0    t1, CP0_CAUSE
>>  +
>>  +       /* Establish Wired (and Random) */
>>  +       mtc0    zero, CP0_WIRED
>>  +       nop
>>  +
>>  +       j       ra
>>  +       nop
>>  diff --git a/board/qemu-mips/qemu-mips.c b/board/qemu-mips/qemu-mips.c
>>  new file mode 100644
>>  index 0000000..76c093c
>>  --- /dev/null
>>  +++ b/board/qemu-mips/qemu-mips.c
>>  @@ -0,0 +1,48 @@
>>  +/*
>>  + * (C) Copyright 2007
>>  + * [5]vlad@comsys.ro
>>     
>
> A name in addition would look nicer. :-)
>
>   
Names are so passe :-)
>>  + *
>>  + * See file CREDITS for list of people who contributed to this
>>  + * project.
>>  + *
>>  + * This program is free software; you can redistribute it and/or
>>  + * modify it under the terms of the GNU General Public License as
>>  + * published by the Free Software Foundation; either version 2 of
>>  + * the License, or (at your option) any later version.
>>  + *
>>  + * This program is distributed in the hope that it will be useful,
>>  + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>  + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>  + * GNU General Public License for more details.
>>  + *
>>  + * You should have received a copy of the GNU General Public License
>>  + * along with this program; if not, write to the Free Software
>>  + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>>  + * MA 02111-1307 USA
>>  + */
>>  +
>>  +#include <common.h>
>>  +#include <command.h>
>>  +#include <asm/mipsregs.h>
>>  +
>>  +long int initdram(int board_type)
>>  +{
>>  +       /* Sdram is setup by assembler code */
>>  +       /* If memory could be changed, we should return the true value here */
>>  +       return MEM_SIZE*1024*1024;
>>     
>
> Qemu gets the amount of RAM passed via a command line switch, the
> qemu-mips emulation sets up a Linux kernel like "command line" in
> memory where u-boot could parse it from.
>
>   
Does it, or just when you pass -kernel to it? I'll check.
>>  +}
>>  +
>>  +
>>  +int checkboard (void)
>>  +{
>>  +       u32 proc_id;
>>  +
>>  +       proc_id = read_32bit_cp0_register(CP0_PRID);
>>  +
>>  +       switch (proc_id >> 24) {
>>  +       default:
>>  +               printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
>>  +       }
>>  +
>>  +       return 0;
>>  +}
>>     
>
> Huh? What is this code good for?
>
>   
Checking for the type of board, I suppose :-)  I think all BSPs have it 
and it's called early in the boot process. I could either do only a 
return 0 or actually decode CP0_PRID and print something meaningful, if 
Qemu sets it to something sensible. Or just print a nice banner.

Thanks for the input. This is a first version and it does what it's 
supposed to do, it booted in qemu HEAD on linux-x86 and in stock 0.90 
for Windows and loaded a linux kernel via dhcp/tftp, nfs, ext2 and fat 
partitions on IDE. I say it can only go up from here :-) Any other 
suggestions are welcome, and if you don't feel like compiling it for a 
test, I can send you a binary by e-mail.


Vlad

Re: [Qemu-devel] U-Boot patch for qemu -M mips

[Thiemo Seufer]

Vlad Lungu wrote:
[snip]
>>>  +long int initdram(int board_type)
>>>  +{
>>>  +       /* Sdram is setup by assembler code */
>>>  +       /* If memory could be changed, we should return the true value 
>>> here */
>>>  +       return MEM_SIZE*1024*1024;
>>>     
>>
>> Qemu gets the amount of RAM passed via a command line switch, the
>> qemu-mips emulation sets up a Linux kernel like "command line" in
>> memory where u-boot could parse it from.
>>
>>   
> Does it, or just when you pass -kernel to it? I'll check.

Hm, you are right, it does that only for -kernel. Would it make sense
to change that in Qemu?

Since the mips_r4k machine doesn't correspond to any real hardware we
have a bit of leeway with the "hardware" design.

>>>  +}
>>>  +
>>>  +
>>>  +int checkboard (void)
>>>  +{
>>>  +       u32 proc_id;
>>>  +
>>>  +       proc_id = read_32bit_cp0_register(CP0_PRID);
>>>  +
>>>  +       switch (proc_id >> 24) {
>>>  +       default:
>>>  +               printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 
>>> 24, proc_id);
>>>  +       }
>>>  +
>>>  +       return 0;
>>>  +}
>>>     
>>
>> Huh? What is this code good for?
>>
>>   
> Checking for the type of board, I suppose :-)  I think all BSPs have it and 
> it's called early in the boot process. I could either do only a return 0 or 
> actually decode CP0_PRID and print something meaningful, if Qemu sets it to 
> something sensible. Or just print a nice banner.

As it is, this code prints a nice "Unsupported CPU" banner no matter what
(and proceeds anyway instead of bailing out).

Latest CVS Qemu supports a number of different CPUs (see the -cpu switch),
the default for 32 bit is a 24Kf, and for 64 bit a R4000.


Thiemo

Re: [Qemu-devel] U-Boot patch for qemu -M mips

[Vlad Lungu]

Thiemo Seufer wrote:
> Vlad Lungu wrote:
> [snip]
>   
>>>>  +long int initdram(int board_type)
>>>>  +{
>>>>  +       /* Sdram is setup by assembler code */
>>>>  +       /* If memory could be changed, we should return the true value 
>>>> here */
>>>>  +       return MEM_SIZE*1024*1024;
>>>>     
>>>>         
>>> Qemu gets the amount of RAM passed via a command line switch, the
>>> qemu-mips emulation sets up a Linux kernel like "command line" in
>>> memory where u-boot could parse it from.
>>>
>>>   
>>>       
>> Does it, or just when you pass -kernel to it? I'll check.
>>     
>
> Hm, you are right, it does that only for -kernel. Would it make sense
> to change that in Qemu?
>   
IDK.  Maybe I can probe the  RAM size in U-Boot , or if this does not 
work, put some info somewhere (RAM, register,
emulated DIP-dwitch), like RAM size, endianness of the CPU.
> Since the mips_r4k machine doesn't correspond to any real hardware we
> have a bit of leeway with the "hardware" design.
>
>   
>>>>  +}
>>>>  +
>>>>  +
>>>>  +int checkboard (void)
>>>>  +{
>>>>  +       u32 proc_id;
>>>>  +
>>>>  +       proc_id = read_32bit_cp0_register(CP0_PRID);
>>>>  +
>>>>  +       switch (proc_id >> 24) {
>>>>  +       default:
>>>>  +               printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 
>>>> 24, proc_id);
>>>>  +       }
>>>>  +
>>>>  +       return 0;
>>>>  +}
>>>>     
>>>>         
>>> Huh? What is this code good for?
>>>
>>>   
>>>       
>> Checking for the type of board, I suppose :-)  I think all BSPs have it and 
>> it's called early in the boot process. I could either do only a return 0 or 
>> actually decode CP0_PRID and print something meaningful, if Qemu sets it to 
>> something sensible. Or just print a nice banner.
>>     
>
> As it is, this code prints a nice "Unsupported CPU" banner no matter what
> (and proceeds anyway instead of bailing out).
>   
True, because it does not care much about this at the moment. Nor do I. 
But that can change.
> Latest CVS Qemu supports a number of different CPUs (see the -cpu switch),
> the default for 32 bit is a 24Kf, and for 64 bit a R4000.
>
>   
I'll look into this and see what use can we make of CP0_PRID.

Vlad

Re: [Qemu-devel] U-Boot patch for qemu -M mips

[Thiemo Seufer]

Vlad Lungu wrote:
> Thiemo Seufer wrote:
>> Vlad Lungu wrote:
>> [snip]
>>   
>>>>>  +long int initdram(int board_type)
>>>>>  +{
>>>>>  +       /* Sdram is setup by assembler code */
>>>>>  +       /* If memory could be changed, we should return the true value 
>>>>> here */
>>>>>  +       return MEM_SIZE*1024*1024;
>>>>>             
>>>> Qemu gets the amount of RAM passed via a command line switch, the
>>>> qemu-mips emulation sets up a Linux kernel like "command line" in
>>>> memory where u-boot could parse it from.
>>>>
>>>>         
>>> Does it, or just when you pass -kernel to it? I'll check.
>>>     
>>
>> Hm, you are right, it does that only for -kernel. Would it make sense
>> to change that in Qemu?
>>   
> IDK.  Maybe I can probe the  RAM size in U-Boot , or if this does not work, 

mips_r4k implements no probable memory controller, so this won't work.

> put some info somewhere (RAM, register,
> emulated DIP-dwitch), like RAM size, endianness of the CPU.

Endianness is rather pointless. If your U-Boot binary doesn't explode
immediately you got the right endianness. :-)


Thiemo

Re: [Qemu-devel] U-Boot patch for qemu -M mips

[Vlad Lungu]

Thiemo Seufer wrote:
> Vlad Lungu wrote:
>   
>> Thiemo Seufer wrote:
>>     
>>> Vlad Lungu wrote:
>>> [snip]
>>>   
>>>       
>>>>>>  +long int initdram(int board_type)
>>>>>>  +{
>>>>>>  +       /* Sdram is setup by assembler code */
>>>>>>  +       /* If memory could be changed, we should return the true value 
>>>>>> here */
>>>>>>  +       return MEM_SIZE*1024*1024;
>>>>>>             
>>>>>>             
>>>>> Qemu gets the amount of RAM passed via a command line switch, the
>>>>> qemu-mips emulation sets up a Linux kernel like "command line" in
>>>>> memory where u-boot could parse it from.
>>>>>
>>>>>         
>>>>>           
>>>> Does it, or just when you pass -kernel to it? I'll check.
>>>>     
>>>>         
>>> Hm, you are right, it does that only for -kernel. Would it make sense
>>> to change that in Qemu?
>>>   
>>>       
>> IDK.  Maybe I can probe the  RAM size in U-Boot , or if this does not work, 
>>     
>
> mips_r4k implements no probable memory controller, so this won't work.
>   
I say let's stick it into a "DIP-switch", so nobody can overwrite it by 
mistake. And you don't have to parse it.
>> put some info somewhere (RAM, register,
>> emulated DIP-dwitch), like RAM size, endianness of the CPU.
>>     
>
> Endianness is rather pointless. If your U-Boot binary doesn't explode
> immediately you got the right endianness. :-)
>
>   
It doesn't actually explode, it sort of almost hits the exception 
handler and freezes there. I don't have a mipsel gdb at hand
to watch it, but it should be fun.
 
pc=EPC   0xbfc00380
ds 0006

STATUS    0x00400006
CAUSE     0x00000428
CONFIG0 0x80000082
CONFIG1 0x9e190c8b

Re: [Qemu-devel] U-Boot patch for qemu -M mips

[vlad]

> Vlad Lungu wrote:
> [snip]
>>>> put some info somewhere (RAM, register,
>>>> emulated DIP-dwitch), like RAM size, endianness of the CPU.
>>>>
>>>
>>> Endianness is rather pointless. If your U-Boot binary doesn't explode
>>> immediately you got the right endianness. :-)
>>>
>>>
>> It doesn't actually explode, it sort of almost hits the exception
>> handler
>> and freezes there. I don't have a mipsel gdb at hand
>> to watch it, but it should be fun.
>> pc=EPC   0xbfc00380
>> ds 0006
>>
>> STATUS    0x00400006
>> CAUSE     0x00000428
>> CONFIG0 0x80000082
>> CONFIG1 0x9e190c8b
>
> Try "qemu-system-mipsel ... -d all", and watch /tmp/qemu.log. :-)

Oh crap. Now I see the problem. Either I misread the 0.90 "info reg" or
there's a difference in how it's handled. It dies on the first instruction
anyway.

Vlad

Re: [Qemu-devel] U-Boot patch for qemu -M mips

[Thiemo Seufer]

Vlad Lungu wrote:
[snip]
>>> put some info somewhere (RAM, register,
>>> emulated DIP-dwitch), like RAM size, endianness of the CPU.
>>>     
>>
>> Endianness is rather pointless. If your U-Boot binary doesn't explode
>> immediately you got the right endianness. :-)
>>
>>   
> It doesn't actually explode, it sort of almost hits the exception handler 
> and freezes there. I don't have a mipsel gdb at hand
> to watch it, but it should be fun.
> pc=EPC   0xbfc00380
> ds 0006
>
> STATUS    0x00400006
> CAUSE     0x00000428
> CONFIG0 0x80000082
> CONFIG1 0x9e190c8b

Try "qemu-system-mipsel ... -d all", and watch /tmp/qemu.log. :-)


Thiemo

Re: [Qemu-devel] U-Boot patch for qemu -M mips TAKE 2

[Vlad Lungu]

Now with board config file included, so it can be built :-)
Thiemo, I'll think about the memory size issue and get back to you on that.
How about a git repo for U-Boot, if this thing takes off?  

Vlad


-------------------------------------------------------------------
diff --git a/Makefile b/Makefile
index 85885b1..8f650d2 100644
--- a/Makefile
+++ b/Makefile
@@ -2444,6 +2444,12 @@ pb1000_config		:	unconfig
 	@echo "#define CONFIG_PB1000 1" >>$(obj)include/config.h
 	@$(MKCONFIG) -a pb1x00 mips mips pb1x00
 
+qemu_mips_config		:	unconfig
+	@mkdir -p $(obj)include
+	@ >$(obj)include/config.h
+	@echo "#define CONFIG_QEMU_MIPS 1" >>$(obj)include/config.h
+	@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
+
 #########################################################################
 ## MIPS64 5Kc
 #########################################################################
diff --git a/board/qemu-mips/Makefile b/board/qemu-mips/Makefile
new file mode 100644
index 0000000..23be447
--- /dev/null
+++ b/board/qemu-mips/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2003-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	= $(BOARD).o flash.o
+SOBJS	= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	 $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/qemu-mips/README b/board/qemu-mips/README
new file mode 100644
index 0000000..39570b1
--- /dev/null
+++ b/board/qemu-mips/README
@@ -0,0 +1,11 @@
+By Vlad Lungu vlad@comsys.ro 2007-Oct-01
+----------------------------------------
+Qemu is a full system emulator. See
+
+http://fabrice.bellard.free.fr/qemu
+
+Limitations & comments
+----------------------
+Supports the "-m mips" configuration of qemu: serial,NE2000,IDE.
+Support is big endian only for now (or at least this is what I tested).
+Derived from au1x00 with a lot of things cut out.
diff --git a/board/qemu-mips/config.mk b/board/qemu-mips/config.mk
new file mode 100644
index 0000000..61269ce
--- /dev/null
+++ b/board/qemu-mips/config.mk
@@ -0,0 +1,11 @@
+
+#
+# Qemu -M mips system emulator
+# See http://fabrice.bellard.free.fr/qemu
+#
+
+# ROM version
+TEXT_BASE = 0xbfc00000
+
+# RAM version
+#TEXT_BASE = 0x80001000
diff --git a/board/qemu-mips/flash.c b/board/qemu-mips/flash.c
new file mode 100644
index 0000000..d419f41
--- /dev/null
+++ b/board/qemu-mips/flash.c
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#if 0
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips */
+#endif
+/*-----------------------------------------------------------------------
+ * flash_init()
+ *
+ * sets up flash_info and returns size of FLASH (bytes)
+ */
+unsigned long flash_init (void)
+{
+	printf ("Skipping flash_init\n");
+	return (0);
+}
+
+int write_buff (/*flash_info_t */ void * info, uchar * src, ulong addr, ulong cnt)
+{
+	printf ("write_buff not implemented\n");
+	return (-1);
+}
diff --git a/board/qemu-mips/lowlevel_init.S b/board/qemu-mips/lowlevel_init.S
new file mode 100644
index 0000000..28166bc
--- /dev/null
+++ b/board/qemu-mips/lowlevel_init.S
@@ -0,0 +1,41 @@
+/* Memory sub-system initialization code */
+
+#include <config.h>
+#include <version.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+
+	.text
+	.set noreorder
+	.set mips32
+
+	.globl	lowlevel_init
+lowlevel_init:
+
+	/*
+	 * Step 2) Establish Status Register
+	 * (set BEV, clear ERL, clear EXL, clear IE)
+	 */
+	li	t1, 0x00400000
+	mtc0	t1, CP0_STATUS
+
+	/*
+	 * Step 3) Establish CP0 Config0
+	 * (set K0=3)
+	 */
+	li	t1, 0x00000003
+	mtc0	t1, CP0_CONFIG
+
+	/*
+	 * Step 7) Establish Cause
+	 * (set IV bit)
+	 */
+	li	t1, 0x00800000
+	mtc0	t1, CP0_CAUSE
+
+	/* Establish Wired (and Random) */
+	mtc0	zero, CP0_WIRED
+	nop
+
+	j	ra
+	nop
diff --git a/board/qemu-mips/qemu-mips.c b/board/qemu-mips/qemu-mips.c
new file mode 100644
index 0000000..66ad97d
--- /dev/null
+++ b/board/qemu-mips/qemu-mips.c
@@ -0,0 +1,83 @@
+/*
+ * (C) Copyright 2007
+ * Vlad Lungu vlad@comsys.ro
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/mipsregs.h>
+
+long int initdram(int board_type)
+{
+	/* Sdram is setup by assembler code */
+	/* If memory could be changed, we should return the true value here */
+	return MEM_SIZE*1024*1024;
+}
+
+
+int checkboard (void)
+{
+	u32 proc_id;
+	u32 config1;
+	
+	proc_id = read_32bit_cp0_register(CP0_PRID);
+	printf("Board: Qemu -M mips CPU: ");
+	switch (proc_id) {
+	case 0x00018000:
+    		printf("4Kc");
+    		break;
+	case 0x00018400:
+    		printf("4KEcR1");
+    		break;
+	case 0x00019000:
+    		printf("4KEc");
+    		break;
+	case 0x00019300:
+		config1 = read_mips32_cp0_config1();
+		if (config1&1)
+    		    printf("24Kf");
+    		    else
+    		    printf("24Kc");
+    		break;
+	case 0x00019500:
+    		printf("34Kf");
+    		break;
+	case 0x00000400:
+    		printf("R4000");
+    		break;
+	case 0x00018100:
+		config1 = read_mips32_cp0_config1();
+		if (config1&1)
+    		    printf("5Kf");
+    		    else
+    		    printf("5Kc");
+    		break;
+	case 0x000182a0:
+    		printf("20Kc");
+    		break;
+	
+	default:
+    		printf("unknown");
+	}
+		printf (" proc_id=0x%x\n", proc_id);
+
+	return 0;
+}
diff --git a/board/qemu-mips/u-boot.lds b/board/qemu-mips/u-boot.lds
new file mode 100644
index 0000000..10c9917
--- /dev/null
+++ b/board/qemu-mips/u-boot.lds
@@ -0,0 +1,69 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk Engineering, <wd@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
+*/
+OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text       :
+	{
+	  *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata  : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data  : { *(.data) }
+
+	. = ALIGN(4);
+	.sdata  : { *(.sdata) }
+
+	_gp = ALIGN(16);
+
+	__got_start = .;
+	.got  : { *(.got) }
+	__got_end = .;
+
+	.sdata  : { *(.sdata) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	uboot_end_data = .;
+	num_got_entries = (__got_end - __got_start) >> 2;
+
+	. = ALIGN(4);
+	.sbss  : { *(.sbss) }
+	.bss  : { *(.bss) }
+	uboot_end = .;
+}
diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index e91e213..1e5b302 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -349,6 +349,7 @@ in_ram:
 	/* Now we want to update GOT.
 	 */
 	lw	t3, -4(t0)	/* t3 <-- num_got_entries	*/
+	sub     t3,2		/* If skipping two entries, adjust length*/
 	addi	t4, gp, 8	/* Skipping first two entries.	*/
 	li	t2, 2
 1:
diff --git a/drivers/ne2000.c b/drivers/ne2000.c
index b7ed876..0bfe74e 100644
--- a/drivers/ne2000.c
+++ b/drivers/ne2000.c
@@ -755,7 +755,7 @@ static void pcnet_reset_8390(void)
 #endif
 	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
 
-	n2k_outb(n2k_inb(nic_base + PCNET_RESET), PCNET_RESET);
+	n2k_outb(n2k_inb(PCNET_RESET), PCNET_RESET);
 
 	for (i = 0; i < 100; i++) {
 		if ((r = (n2k_inb(EN0_ISR) & ENISR_RESET)) != 0)
@@ -833,6 +833,7 @@ static int plen[NB];
 static int nrx = 0;
 
 static int pkey = -1;
+static int initialized=0;
 
 void uboot_push_packet_len(int len) {
 	PRINTK("pushed len = %d, nrx = %d\n", len, nrx);
@@ -846,7 +847,12 @@ void uboot_push_packet_len(int len) {
 	}
 	plen[nrx] = len;
 	dp83902a_recv(&pbuf[nrx*2000], len);
+/*Just pass it to the upper layer*/
+	NetReceive(&pbuf[nrx*2000], plen[nrx]);
+/*eth_rx() was gutted, so this is not needed anymore*/
+#if 0
 	nrx++;
+#endif
 }
 
 void uboot_push_tx_done(int key, int val) {
@@ -903,37 +909,21 @@ int eth_init(bd_t *bd) {
 	if (dp83902a_init() == false)
 		return -1;
 	dp83902a_start(dev_addr);
+	initialized=1;
 	return 0;
 }
 
 void eth_halt() {
 
 	PRINTK("### eth_halt\n");
-
-	dp83902a_stop();
+	if(initialized)
+		dp83902a_stop();
+	initialized=0;
 }
 
 int eth_rx() {
-	int j, tmo;
-
-	PRINTK("### eth_rx\n");
-
-	tmo = get_timer (0) + TOUT * CFG_HZ;
-	while(1) {
-		dp83902a_poll();
-		if (nrx > 0) {
-			for(j=0; j<nrx; j++) {
-				NetReceive(&pbuf[j*2000], plen[j]);
-			}
-			nrx = 0;
-			return 1;
-		}
-		if (get_timer (0) >= tmo) {
-			printf("timeout during rx\n");
-			return 0;
-		}
-	}
-	return 0;
+dp83902a_poll();
+return 1;
 }
 
 int eth_send(volatile void *packet, int length) {
diff --git a/drivers/ne2000.h b/drivers/ne2000.h
index 2955533..6c31f47 100644
--- a/drivers/ne2000.h
+++ b/drivers/ne2000.h
@@ -42,7 +42,7 @@ are GPL, so this is, of course, GPL.
  this file might be covered by the GNU General Public License.
 
  Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
- at http://sources.redhat.com/ecos/ecos-license/ */
+ at http://sources.redhat.com/ecos/ecos-license/ 
  -------------------------------------------
 ####ECOSGPLCOPYRIGHTEND####
 ####BSDCOPYRIGHTBEGIN####
diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
new file mode 100644
index 0000000..b8fc049
--- /dev/null
+++ b/include/configs/qemu-mips.h
@@ -0,0 +1,172 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This file contains the configuration parameters for the dbau1x00 board.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MIPS32		1  /* MIPS32 CPU core	*/
+#define CONFIG_QEMU_MIPS        1
+#undef DEBUG
+
+#define CONFIG_ETHADDR		52:54:00:12:34:56    /* Ethernet address */
+#define CONFIG_IPADDR		10.0.2.15    	     /* Our IP address */
+#define CONFIG_SERVERIP		10.0.2.2	     /* Server IP address*/
+
+#define CONFIG_BOOTDELAY	10	/* autoboot after 10 seconds	*/
+
+#define CONFIG_BAUDRATE		115200
+
+/* valid baudrates */
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+#define	CONFIG_TIMESTAMP		/* Print image info with timestamp */
+#undef	CONFIG_BOOTARGS
+
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"addmisc=setenv bootargs ${bootargs} "				\
+		"console=ttyS0,${baudrate} "				\
+		"panic=1\0"						\
+	"bootfile=/tftpboot/vmlinux\0"				\
+	"load=tftp 80500000 ${u-boot}\0"				\
+	""
+
+#define CONFIG_BOOTCOMMAND	"bootp;bootelf"
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BDI
+#undef CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_ELF
+#undef CONFIG_CMD_ENV
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_RUN
+
+
+#define CONFIG_CMD_DHCP
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
+#define CONFIG_CMD_NET
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_DRIVER_NE2000
+#define CONFIG_DRIVER_NE2000_BASE	(0xb4000300)
+
+#define CFG_NO_FLASH
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE    1
+#define CFG_NS16550_CLK         115200
+#define CFG_NS16550_COM1        (0xb40003f8)
+#define CONFIG_CONS_INDEX	1
+
+#define CONFIG_CMD_IDE
+#define CONFIG_DOS_PARTITION
+
+#define CFG_IDE_MAXBUS	2
+#define CFG_ATA_IDE0_OFFSET	(0x1f0)
+#define CFG_ATA_IDE1_OFFSET	(0x170)
+#define CFG_ATA_DATA_OFFSET	(0)
+#define CFG_ATA_REG_OFFSET	(0)
+#define CFG_ATA_BASE_ADDR	(0xb4000000)
+
+#define CFG_IDE_MAXDEVICE	(4)
+/*3f6*/
+
+/*
+ * Miscellaneous configurable options
+ */
+#define	CFG_LONGHELP				/* undef to save memory      */
+
+#define	CFG_PROMPT		"qemu-mips # "	/* Monitor Command Prompt    */
+
+#define	CFG_CBSIZE		256		/* Console I/O Buffer Size   */
+#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)  /* Print Buffer Size */
+#define	CFG_MAXARGS		16		/* max number of command args*/
+
+#define CFG_MALLOC_LEN		128*1024
+
+#define CFG_BOOTPARAMS_LEN	128*1024
+
+#define CFG_MHZ			132
+
+#define CFG_HZ                  (CFG_MHZ * 1000000) /* FIXME causes overflow in net.c */
+
+#define CFG_SDRAM_BASE		0x80000000     /* Cached addr */
+
+#define	CFG_LOAD_ADDR		0x81000000     /* default load address	*/
+
+#define CFG_MEMTEST_START	0x80100000
+#define CFG_MEMTEST_END		0x80800000
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+
+/* The following #defines are needed to get flash environment right */
+#define	CFG_MONITOR_BASE	TEXT_BASE
+#define	CFG_MONITOR_LEN		(192 << 10)
+
+#define CFG_INIT_SP_OFFSET	0x400000
+
+/* We boot from this flash, selected with dip switch */
+#define CFG_FLASH_BASE		0xbfc00000
+
+#define	CFG_ENV_IS_NOWHERE	1
+
+/* Address and size of Primary Environment Sector	*/
+#define CFG_ENV_SIZE		0x10000
+#undef CONFIG_NET_MULTI
+
+#define MEM_SIZE 128
+
+#undef CONFIG_MEMSIZE_IN_BYTES
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_DCACHE_SIZE		16384
+#define CFG_ICACHE_SIZE		16384
+#define CFG_CACHELINE_SIZE	32
+
+#endif	/* __CONFIG_H */

Re: [Qemu-devel] U-Boot patch for qemu -M mips TAKE 2

[Wolfgang Denk]

In message <4704EA18.3050603@comsys.ro> you wrote:
> Now with board config file included, so it can be built :-)
> Thiemo, I'll think about the memory size issue and get back to you on that.
> How about a git repo for U-Boot, if this thing takes off?  

We actually have already a lot of them -  the  master  repo  and  the
custodian  repositories. Logically, your code should go into the MIPS
repo. I think you should start posting on  the  U-Boot  mailing  list
instead     of     sending     to     my    direct    address;    see
http://www.denx.de/wiki/UBoot/WebHome for details.

BTW: Your code has a few minor coding style  violations  (indentation
by spaces instead of TAB), and the signed-off-ny line is missing.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
"To IBM, 'open' means there is a modicum  of  interoperability  among
some of their equipment."                            - Harv Masterson

Re: [Qemu-devel] U-Boot patch for qemu -M mips TAKE 2

[Vlad Lungu]

Wolfgang Denk wrote:
> In message <4704EA18.3050603@comsys.ro> you wrote:
>   
>> Now with board config file included, so it can be built :-)
>> Thiemo, I'll think about the memory size issue and get back to you on that.
>> How about a git repo for U-Boot, if this thing takes off?  
>>     
>
> We actually have already a lot of them -  the  master  repo  and  the
> custodian  repositories. Logically, your code should go into the MIPS
> repo. I think you should start posting on  the  U-Boot  mailing  list
> instead     of     sending     to     my    direct    address;    see
> http://www.denx.de/wiki/UBoot/WebHome for details.
>   
Actually, this was directed at the Qemu list. But thanks for the offer. 
I suppose they could just point
to your repo in the source release/dev tree and  store the corresponding 
source snapshot when doing a binary
release with information included in the README, and it would be kosher 
Re: GPL.
> BTW: Your code has a few minor coding style  violations  (indentation
> by spaces instead of TAB), and the signed-off-ny line is missing.
>   
Might be. I use joe/mcedit/vi in random order to edit source files, 
that's the source of the spaces, and the patch was rather
informal so no signoff. I'll re-branch and do a 3-part (GOT,NE2000,qemu) 
patchset .

Vlad